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xzhen · 2023-02-13

When I design the FPGA interface, I need the detail timing para. when M4 in memory map mod. Where can I get the docu? thank you

xzhen · 2022-07-21

Thanks all Xiao Zhen

xzhen · 2022-07-21

Hi, RussWe meet the same problem. Because we use the 1GB DDR , so the sdb map the buffer to the 0xe8xxxxxx. And M4 can't write the data. How can I change the CMA config, Is it in the dts?

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I connect mp157&M4 to the fpga. I design the qspi using the dual bank mode, in memory map mode. but I can't get the detail timing diagram.

Re: RPMSG SDB driver: memory being allocated from the A7 is not accessible to the M4.

Re: RPMSG SDB driver: memory being allocated from the A7 is not accessible to the M4.