About KLian.1

KLian.1 · 2021-07-06

typedef struct{ UINT32 R0; UINT32 R1; UINT32 R2; UINT32 R3; UINT32 R12; UINT32 LR; UINT32 PC; UINT32 IPSR; }STACK_DATA_TYPE;

KLian.1 · 2021-07-07

You meaning through the function "__get_PSP()" running in the hardFaultIsp() , we can't get the correct process stack address ?

KLian.1 · 2021-07-07

Thank your answer�?

KLian.1 · 2021-07-06

The PSP address indicates the stack top of the pre-exception thread task. When hard fault exception handler excute, it would push R0/1/2/3/12/LR/PC/IPSR into the task stack, so through the PSP value, also get the LR/PC value. But why the LR/PC valu...

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I am working on cortex M4 (STM32F407) with ucOSII, now I have found low probability that enter the hard fault exception, in the hard fault hanler we can get the PSP address (task stack) , but the LR/PC value stored in the stack are 0xFFFFFFFF.

Re: I am working on cortex M4 (STM32F407) with ucOSII, now I have found low probability that enter the hard fault exception, in the hard fault hanler we can get the PSP address (task stack) , but the LR/PC value stored in the stack are 0xFFFFFFFF.

Re: I am working on cortex M4 (STM32F407) with ucOSII, now I have found low probability that enter the hard fault exception, in the hard fault hanler we can get the PSP address (task stack) , but the LR/PC value stored in the stack are 0xFFFFFFFF.

Re: I am working on cortex M4 (STM32F407) with ucOSII, now I have found low probability that enter the hard fault exception, in the hard fault hanler we can get the PSP address (task stack) , but the LR/PC value stored in the stack are 0xFFFFFFFF.