Posted on January 04, 2015 at 08:41The original post was too long to process during our migration. Please click on the attachment to read the original post.
Posted on January 31, 2015 at 00:23Update: I resolved my previous NOR FLASH by disabling the chip select line that is connected to the external RAM, which is also on my custom board. Since I don't need to use the external RAM at the moment, I forgo...
Posted on January 05, 2015 at 16:39When I tried with and without <<1 my MFR ID is 0xFF. I copy/pasted that line of code from the Microchip driver and modified ''system_base'' accordingly: #define sysAddress(offset) ((volatile WORD *)(system_base + ...
Posted on January 04, 2015 at 19:55Update: One thing I forgot to mentioned is that PG6 on the processor is connected to /EXT_LATCH_OE on the 16-bit D Latch. I have just configured PG6 to AF FSMC thinking that the FSMC subsystem will take care the r...
Posted on January 04, 2015 at 18:05 I've also attached the schematic to show the components involved besides STM32F407 and the external flash, which includes a single inverter and a 16 bit D-latch. The board also uses an external crystal andmy tho...
