About CDesh

CDesh · 2021-05-30

I am using STM32L072xx module and I would like to use ADC4, ADC5 and ADC 17 (Vrefint) at the same time. But I want to use ADC4 with DMA of buffer size 500 or more. It is not necessary to store ADC5 & ADC17 in DMA.Can I use DMA only for ADC 4 and dump...

CDesh · 2021-03-19

Hello,I am using STM32L072xx, Core: Arm® 32-bit Cortex®-M0+ with MPU– From 32 kHz up to 32 MHz max.– 0.95 DMIPS/MHzI have the following questionCan I implement FFT algorithms to read ADC values?How can I implement ZCD(zero crossing detection) algorit...

CDesh · 2021-02-27

Hi,From the data sheet of STM32L072xx it is mentioned that Tvrefint start up time is 2-3msec. When using Vrefint in comparator, does controller take 2-3msec each time to compare input with Vrefint or it is just the initial start up time?Because I hav...

CDesh · 2021-02-25

Hi,I am reading value of SYSCFG_CFGR3_VREFINT_RDYF to be "1073741824". How do I interpret the value of VREFINT_RDYF from the value I am reading?

CDesh · 2021-02-21

Hi everyone,I am using comparator 2 to capture a signal of duration 3-5usec. But observed that, I am able to trigger the comparator only when the duration of the signal is >5usec. I was wondering if there is any delay introduced by Vrefint in STM32L0...

CDesh · 2021-08-06

@Philippe Cherbonnel Thanks for your constant support. I am able to resolve the conflict by calling the following function. I referred to an example from STM32Cube_FW_L0_V1.12.0\Projects\NUCLEO-L073RZ\Examples\ADC\ADC_DMA_Transfer which helped me fi...

CDesh · 2021-08-06

@Philippe Cherbonnel I believe nesting of interrupts is not handled properly. Following are priorities assigned to IRQsHAL_NVIC_SetPriority(ADC1_COMP_IRQn, 3, 0);HAL_NVIC_EnableIRQ(ADC1_COMP_IRQn);HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0);HAL_N...

CDesh · 2021-08-05

@Philippe Cherbonnel I did compare your program with mine. It would work fine if single channel with limited samples are used. But I am using the following with 3 different ADC channels with different buffer lengths for (j=0; j<2; j++) { MX_AdcIni...

CDesh · 2021-08-03

@Philippe Cherbonnel I am processing IRQ event sources like:void ADC1_COMP_IRQHandler(void){ HAL_COMP_IRQHandler(&Comp1Handle);}Also using overrun setting as mentioned below:hadc.Init.Overrun = ADC_OVR_DATA_PRESERVED;

CDesh · 2021-08-02

@Philippe Cherbonnel Thanks for your response.(1) when I comment following sections, code is working as expected with 4000 samples in DMA buffer HAL_NVIC_SetPriority(ADC1_COMP_IRQn, 3, 0);HAL_NVIC_EnableIRQ(ADC1_COMP_IRQn);(2) I am getting stuck wh...

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Multiple ADC channels on STM32L072xx

FFT and ZCD algorithm implementation

TVREFINT Internal reference startup time - - 2-3 ms

Value of VREFINT_RDYF

STM32L0xx Comparator2

Re: Multiple ADC channels on STM32L072xx

Re: Multiple ADC channels on STM32L072xx

Re: Multiple ADC channels on STM32L072xx

Re: Multiple ADC channels on STM32L072xx

Re: Multiple ADC channels on STM32L072xx