About Elektraglide

Elektraglide · 2021-11-30

This from a project I've been building color display output blogged here:https://medium.com/@adambillyard/experiments-in-hard-realtime-35136ed79398

Elektraglide · 2021-02-20

Set up TIM4 to generate a hsync pulse of 2us RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM4, ENABLE); TIM_Cmd(TIM4, DISABLE); TIM_TimeBaseInitTypeDef timerInitStructure; timerInitStructure.TIM_Prescaler = 0; timerInitStructure.TIM_CounterMode = TIM_...

Elektraglide · 2021-01-16

If I set it to Active, it cannot be overwritten.. What am I missing?

Elektraglide · 2021-12-05

[Mea culpa! I've pasted the code that generates this 2uS pulse scope trace further down the thread]And yes, I think M2M DMA performance is more nuanced than I read in the manuals.Will try the DMA experiment. I think I need to configure the DMA to be ...

Elektraglide · 2021-12-05

[Apologies for answering my own question, but I now think I understand the STM32 behaviour]Much of the docs refer to APB1 and APB2 and the different clock rates. Specifically, TIM1 & TIM8 being on APB2 (72MHz), other timers being on APB1 (36MHz).I am...

Elektraglide · 2021-12-05

// setup PB0 driven by TIM3_CH3 PWM // GPIO_AFConfigure(AFIO_TIM3_NO_REMAP); RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB, ENABLE); GPIO_InitTypeDef GPIO_InitDef; GPIO_StructInit(&GPIO_InitDef); GPIO_InitDef.GPIO_Pin = GPIO_Pin_0; GPIO_InitDe...

Elektraglide · 2021-12-04

All my PWM calculations are based on a 72MHz timer and the scope confirms I get precisely what I expect (2us pulse width), so I believe APB2 is running at full speed.

Elektraglide · 2021-12-04

Perhaps a simpler solution: Can anyone point me at some code example that sets up DMA1 running at 72MHz?

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I get STM32F103 DMA speed of 160 bytes in 1600 clock cycles => 1 transfer every 10 clock cycles. What else is contending the bus? Just seems a bit slow.

TIM4 is a master, TIM3 is a slave. Given the same values I expected their respective CCx IRQ to fire at about the same time.

I am using GPIOA in Alternate Function mode. I'm using Channel 1 & 2 as PWM but I want to bit-bang Channel 3 in the Channel CC2 IRQ (ie turn it on/off). What do I set the Channel 3 OCMode to?

Re: I get STM32F103 DMA speed of 160 bytes in 1600 clock cycles => 1 transfer every 10 clock cycles. What else is contending the bus? Just seems a bit slow.

Re: I get STM32F103 DMA speed of 160 bytes in 1600 clock cycles => 1 transfer every 10 clock cycles. What else is contending the bus? Just seems a bit slow.

Re: I get STM32F103 DMA speed of 160 bytes in 1600 clock cycles => 1 transfer every 10 clock cycles. What else is contending the bus? Just seems a bit slow.

Re: I get STM32F103 DMA speed of 160 bytes in 1600 clock cycles => 1 transfer every 10 clock cycles. What else is contending the bus? Just seems a bit slow.

Re: I get STM32F103 DMA speed of 160 bytes in 1600 clock cycles => 1 transfer every 10 clock cycles. What else is contending the bus? Just seems a bit slow.