While testing the exception traps routines I ran into an odd problem with the SRAM2 parity check on an STM32L496. As part of a unit test I force a usage error by attempting to read from 0x3000 0000, an invalid address. The usage vector is called co...

I configured the SPI2 port for bidirectional (BIDIMODE = 1) and rx (BIDIOE = 0), then enabled the port (SPE = 1). According to the RM the enable should immediately start sending clock pulses out the SCK pin and read data on the MOSI pin, since it is...