Posted on May 01, 2017 at 02:00Thanks Clive! Maybe one of the HAL geniuses will notice the thread and explain!! Allan 

Posted on May 01, 2017 at 00:13Clive, thank you. Why are there 4 (or sometimes 2) fencing instructions? Why is the SPI read in the sample code done 1 byte at a time rather than n bytes? Allan

Posted on May 01, 2017 at 00:01Seb, Geoffrey, is it possible for you to explain to a newbie what those comments and dsp instruction mean? /* In master RX mode the clock is automaticaly generated on the SPI enable.       So to guarantee the clock gen...