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michalik · 2015-07-24

Posted on July 24, 2015 at 11:09Hey guys! I have an issue with the SPI Interface of the STM32F401VB. To communicate with an ADC from LTC, I need to configure the SCK to stay high during idle time. Unfortunately the clock always starts low, see scop...

michalik · 2015-07-24

Posted on July 24, 2015 at 15:37Sorry my mistake.. the uC is the master but in receiving mode. so there is only data on the MISO line. Nevertheless, I've already used the pullup resistor and now it's working. Still, thanks a lot for your heldp JW!

michalik · 2015-07-24

Posted on July 24, 2015 at 14:33I'm acting as a slave, so why should I try to write anything into DR? EDIT: Okay I've got the solution. The ST MCU support team answered and said that after the transmittion, SCK goes to Z-State. So to have a SCK line...

michalik · 2015-07-24

Posted on July 24, 2015 at 13:54yes. the problem is that CLK should end high and start high again, but as you can see on the scope shot it starts low, ends high but goes into some kind of tristate..

michalik · 2015-07-24

Posted on July 24, 2015 at 12:25I've checked the registers and the values are written corretly. So it seems that the HAL driver is okay and working corretly. PS: Location's Germany, NRW.

michalik · 2015-07-24

Posted on July 24, 2015 at 11:33 Hello Jan, yes I know that CPOL and CPHA are the bits to set and I did. As you can see on the scope, the SCK is High after the transmittion is finished but it goes to low slowly and the SCK is low again w...

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STM32F401VB - Clock Idle State of SPI Interface does not stay high

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Re: STM32F401VB - Clock Idle State of SPI Interface does not stay high

Re: STM32F401VB - Clock Idle State of SPI Interface does not stay high

Re: STM32F401VB - Clock Idle State of SPI Interface does not stay high