Posted on May 02, 2018 at 20:48I'm using the gate mode TIM scheme as detailed in the reference manual:TIM3->CCMR1 |= TIM_CCMR1_CC1S_0; /* (1)*/ TIM3->CCER |= TIM_CCER_CC1P; /* (2) */ TIM3->SMCR |= TIM_SMCR_SMS_2 | TIM_SMCR_SMS_0 | TIM_SMCR_TS_2 | TI...