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Aditya Mall
Associate II
since ‎2018-07-19
‎2023-06-14

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Explanation for NVIC_EnableIRQ(irq_no)

2018-05-17
Posted on May 17, 2018 at 20:19Hello EE verse,Can anyone explain the below implementation ?I did see the reference to this function in the cortex_m4 generic reference manual but couldn't understand how the register is mapped.Also no sure why in NVIC...

uint32_t Buttons_GetState (void) explanation?

2018-05-16
Posted on May 16, 2018 at 22:42Hi All,Just saw the BSP for buttons on Keil, came across this, can anyone explain how this actually works when one presses the button.Apparently if one was supposed to press button say at pin 13 in this case, GPIOC->ID...

HSE ON cleared after HSE RDY set to HIGH?

2018-05-01
Posted on May 01, 2018 at 19:05in RCC_CR register does the HSE ON bit gets cleared or not after HSE RDY bit is set to high by MCU? For ex.Set by user:-  17th Bit             16th Bit  HSE RDY [ 0 ],  HSE ON [ 1 ]         //set by userHSE RDY [ 1 ], ...

HSE RDY high without HSE clock ?

2018-04-29
Posted on April 29, 2018 at 13:55I am using the Nucleo-64 board F401RE, as the name suggest comes with STM32F401RE.The board doesn't have an external clock (X3 mentioned on the board) and still the HSE RDY register gets enabled  , which is actually ...
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