On an STM32F103 I configure SPI in 16bit wide mode and set up a DMA transfer to transmit one word:SPI2->CR1 &= ~SPI_CR1_SPE;
SPI2->CR2 = 0;
SPI2->CR1 =
SPI_CR1_SSM |
SPI_CR1_SSI |
SPI_CR1_DFF |
SPI_CR1_SPE |
/* Some baud rate flag...
Posted on May 20, 2018 at 21:28
On an STM32F103 nucleo board I occasionally find my program locked in a loop waiting for the SPI2's BSY bit to become cleared.
I am, honestly, totally clueless what is happening here. I am hardly able to track d...
Posted on February 20, 2018 at 19:26
On an STM32F103RB, after switching the SPI1 from 8 bit to 16 bit the last byte received while still in 8 bit mode is received again in 16 bit mode.
SPI1 is configured as a plain master as follows:
RCC->...
Sh*t, sh*t, sh*t :face_screaming_in_fear: I accidentally enabled the SPI's CRC somewhere. So the additional tranfer stems from the checksum...Thanks a lot!