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Hello,In the RM0433 (rev 3) the DBGMCU_APB4FZ1 offset is incorrectly marked in the detail section.It is 0x04C and should be 0x054.The register summary is correct. But if somebody is using the detail section - can make an error.BTW: What does the LS s...
In the previous ST products (mostly the STM32F and L series) I was able to disable the IWDG when code went into debug.Unfortunately, in the H7 I can see the introduction of new mechanism controlled by bit WDGLSD1 in DBGMCU_APB4FZ1 register. On the bl...
There is a "2" missing in the define at the beginning of the stm32h7xx_hal_usart.h file. Can somebody fix it for the next release? - if there is one./* Define to prevent recursive inclusion -------------------------------------*/#ifndef __STM32H7xx_H...
Reference manual for STM32H7 series (RM0433), on page 697, does not show an entry for NVIC interrupt 123. What is the interrupt? Can the documentation be fixed by the team.Interrupts that are not triggered by the MCU are normally marked with a line a...
When querying STM32H7 system bootloader with GET (0x00) command, it responds with:31-00-01-02-11-21-31-44-63-73-82-92-FF-79in e.g. STM32F4 series the response was:31-00-01-02-11-21-31-44-63-73-82-92-79The AN3155 document does not mention the extra by...
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