Posted on March 13, 2018 at 20:54I think that I solve this problem. I changed in system_stm32f0xx.c:1) pllmull = CC->CFGR & RCC_CFGR_PLLMULL; to pllmull = CC->CFGR & RCC_CFGR_PLLMUL;2) prediv1factor = (CC->CFGR2 & RCC_CFGR2_PREDIV1) + 1; to prediv1f...