About TMats.9

TMats.9 · 2022-02-24

I am using spi slave mode,hardware nss setting.when cs is low,if there are a lot of clocks due to noise,Is shift register cleared at the rising nss edge?

TMats.9 · 2021-11-18

When I try to flash erase program on stm32g07, using HAL_FLASHEx_Erase,Once cpu freezes.I am using EWARM and ICE use I-JET. After executing HAL_FLASHEx_Erase, the following debug error is output.The processor cannot be debugged. The debug registe...

TMats.9 · 2022-03-01

Thank you for your answer.I have resolved.I tested it on MCU, when NSS was asserted,shift register was reset.

TMats.9 · 2022-02-24

Thank you for your answer.I thought, when nss is high,the shift register would be reset automatically,is that wrong?I want to reset the result of an accidental shift out shift register,when nss is high.When SCK toggling due to noise or anything e...

User statistics

User Activity

Using spi slave mode,hardware nss setting. Is shift register cleared at nss rise edge?

When I try to flash erase program on stm32g07, using HAL_FLASHEx_Erase,Once cpu freezes.

Re: Using spi slave mode,hardware nss setting. Is shift register cleared at nss rise edge?

Re: Using spi slave mode,hardware nss setting. Is shift register cleared at nss rise edge?