Posted on September 12, 2017 at 19:21part of code from CoIDE//----------Clock configure-------------//RCC->CFGR |= RCC_CFGR_PLLMULL4;          // PLL multiplication factor = 4 RCC->CR |= RCC_CR_PLLON; // PLL start RCC->CFGR |= RCC_CFGR_SW_PLL;      ...