About LTruo.1

LTruo.1 · 2021-09-17

Hi there,First time working with DMA here and I'm getting data loss when the frequency of a PWM signal is varied during the DMA reading. The DMA request is triggered by a 16MHz clock. I'm using DMA2 on STM32f429zi.The DMA direction is peripheral to m...

LTruo.1 · 2021-09-20

DMA2 is triggered by an input capture signal from the ADC, not TIM3. TIM3 is just generating a PWM.

LTruo.1 · 2021-09-20

The data transferred from the IDR line is a sine wave signal, where there should be 4 samples per period. The data loss is seen when there's only 3 samples per period, believing that one sample point is lost. The reading is negative since it's signed...

User statistics

User Activity

DMA data loss when changing PWM frequency during the DMA reading

Re: DMA data loss when changing PWM frequency during the DMA reading

Re: DMA data loss when changing PWM frequency during the DMA reading