About GLero.1

GLero.1 · 2021-10-10

I am trying to change from using a Timer PWM controlled outgoing bit stream to an SPI controlled outgoing bit stream. It would be very nice to output a 32-bit word in one shot using the 4-byte FIFO at each TXE interrupt, but the RM seems to indicat...

GLero.1 · 2021-09-03

GLero.1 · 2021-10-11

This would be a kludgy workaround for a bad design. Doing this means having to chain the "TXHE" signal event to start a timer set up to interrupt when it THINKS the SPI fifo is empty. Bad design.If the designers wanted a TXHE signal then they shoul...

GLero.1 · 2021-10-11

Actually, no it isn't if the interrupt happens where 2-bytes still have data in them and only 2-bytes are available for me to put data in. I either wait for it to be fully empty or I treat it as a 2-byte fifo.

GLero.1 · 2021-10-11

I have already started on the DMA option on the assumption that TXE was set at 1/2. But for the interrupt option, this turns a 4-byte fifo into a 2-byte fifo. In order to use the full 4-byte fifo in the interrupt routine, I would have to sit, IN AN...

GLero.1 · 2021-09-05

Thanks for this info. This should be very useful.The define ...RTCEN you provided is close to what I was looking for, but I originally could only find defines of "...RTCEN" that were 0x1 not 0x1<<15. This would make coding extreeemely cumbersome so...

GLero.1 · 2021-09-04

I was in the process of composing this when I realized my oscillator was connected to pin 4, not 3. The 32KHz is at 32K out MCO1. Things initialize correct at this point except the clock is running very fast, as if the pre-divide is not dividing. Th...

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When exactly does SPI TXE get set in an F730

RTC LSE Bypass - I wrote code that RTC works with HSE as clock in, but the same code using LSEBYP w/ external 32KHz oscillator can't get past LSERDY not INITF. Any docs found so far mentions LSEBYP but none indicates how it all works together.

Re: When exactly does SPI TXE get set in an F730

Re: When exactly does SPI TXE get set in an F730

Re: When exactly does SPI TXE get set in an F730

Re: RTC LSE Bypass - I wrote code that RTC works with HSE as clock in, but the same code using LSEBYP w/ external 32KHz oscillator can't get past LSERDY not INITF. Any docs found so far mentions LSEBYP but none indicates how it all works together.

Re: RTC LSE Bypass - I wrote code that RTC works with HSE as clock in, but the same code using LSEBYP w/ external 32KHz oscillator can't get past LSERDY not INITF. Any docs found so far mentions LSEBYP but none indicates how it all works together.