YVido.1

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‎2023-06-14

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Data bits shifted in SPI communication on STM32L462 after repeating one successful session (consisting of NSS falling edge, 3 separated transmissions with HAL_SPI_TransmitReceive, NSS, rising edge)

2020-07-28

Data bits are shifted on second SPI session (BSY bit stay high at the end of data transfer in slave mode) We are using STM32L462VET6, and initialize SPI2 in full duplex slave mode (CPOL=1, CPHA=2-edges) with software NSS and baudrate 960 kHz with HCL...