Posted on March 20, 2013 at 17:36
I'm having an issue wherein TR and SSR values don't logically match up, on an approximately 1 Hz read cycle where reads occur very close to the RTC update time. I'm perplexed, and almost ready to throw my board o...
Posted on March 20, 2013 at 21:36Actually... Not that this is any longer relevant to the original topic, but...As it turns out, neither my math:fracsec = 999 - (fracsec - fracsec / 42)...nor yours:fracsec = 1000 * (1023 - fracsec) / 1024...works the...
Posted on March 20, 2013 at 20:06JW,Looks like you're probably right. I ought to have a look at what my own compiler produces. And even though you're right - I'm waiting for RSF and that wait will blow away any speed differences - well, there's some...
Posted on March 20, 2013 at 19:28JW,In integer math, (1023 - fracsec) / 1024 = 0, always. Were you thinking of floating point?The corrected calculation is fracsec = 999 - (fracsec - fracsec/42). That's integer milliseconds, again.I agree with your a...
Posted on March 20, 2013 at 18:49OH! What you wrote just clicked! My apologies, I missed the fact the first time, and didn't catch it until I read JW's response:SSR is a DOWNcounting register!That's it. Utter relief!THANK YOU, Clive and JW!!
Posted on March 20, 2013 at 18:45It's not bogus, Clive. It calculates milliseconds from the counter value using integers, to a sufficient degree of accuracy for my application (within about 0.6 ms deviation max).Since the RTC S prescaler is set to 1...
