Posted on August 30, 2012 at 13:56Hi,Could someone please point me to some documentation regarding SPI interrupts and what they actually mean from a hardware perspective?I am currently having an issue with SPI overrun. From the ''SPI_I2S_IT_OVR' fla...

Posted on August 16, 2012 at 16:27Hi,I am looking for recommendations as to how best to deal with SPI transactions where the SPI word length is greater than 16 bits.I intend to use 64 bit transactions from the host PC to my stm32 board. Therefore, I...

Posted on July 18, 2012 at 13:41I am having some problems in that the SCLK signal for my SPI (when using either SP1 or SPI2) appears to be incorrect. Although the period is stable throughout and as I would expect, the clock pulse itself is non symme...

Posted on June 08, 2012 at 17:42Hi,I am having some difficulty receiving SPI data correctly and I am hoping someone could help.I currently have two STM32L-Discovery boards connected via SPI with one acting as master and one as slave. My SPI transmis...

Posted on May 30, 2012 at 18:19Hi,I am trying to understand the operation of the STM32L-Discovery with the aim of setting up SPI transactions between two STM32L-Discovery devices.When I look at the specs:1) SPI1:SPI1 is defined on PA4, PA5, PA6 and ...