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flyer31 · 2024-04-19

RM0444 (Rev. 5 Nov 2020 - should be newest): Chapter 15.8 Oversampler: "N is defined using the OVFS[2:0] bits": this should say "OVSR[2:0]" bits. Chapter 15.12.3: Register ADC_CR Note for AD_EN: "set ADEN only when all bits of ADC_CR registers are 0"...

flyer31 · 2022-12-21

Hello,I would like to use TWO circular DMA buffers for ONE I2C interface.Depending on received address byte, in the ADDR interrupt I would always enable the correct circular buffer (disabling the other one - so at one time always only ONE buffer is a...

flyer31 · 2022-12-21

Hi,in RM STM32G4 (I use Rev. 7, page 1882, Figure 648 "Transfer sequence flow for I2C master transmitter for N>255bytes":The "RELOAD=0" info in last box at "N<256" is wrong.It must instead say RELOAD=1, AUTOEND=1 (otherwise Stop bit will fire immedia...

flyer31 · 2022-10-17

Hello, I would love to add a USB storage device (USB stick) to my terrific new STM32G4 application.But I am frightened, with the STM32G4 USB device interface this is impossible?(or this there some way to come around this?)(or is there any possibility...

flyer31 · 2022-08-19

Hi,I want that my user can re-program (through my application) some upper part of flash for configuration of the device, e. g. the upper 100 kByte.Until now, I used STM32G473, there this was no problem, as this was dual-bank memory device.Now I would...

flyer31 · 2022-12-21

Sorry, I just recognized a flaw in my I2C init function... .I enforce there "CR1_NOSTRETCH" - also if I initialize as Master.But RM in register description of I2C_CR1 (41.7.1) clearly says for NOSTRETCH: "It must be kept cleared in master mode"... .A...

flyer31 · 2022-12-21

Hi Piranha,I have written a small test application with 2 own boards,... but based on STM standard example STM32Cube_FW_G4_V1.4.0\Projects\NUCLEO-G474RE\Examples_LL\I2C\I2C_TwoBoards_MasterTx_SlaveRx_DMA_Init... just I stripped HAL - I use my own "Ab...

flyer31 · 2022-12-21

I skipped it now... I use a different scheme now with one buffer only and a separate list/array marking the addresses and the corresponding DMA buffer start offsets.Thank you for your answer.

flyer31 · 2022-08-16

Thank you :) ... ... but this difference STM32G473 to STM32G491 anyway is a BIT bizarre, as both STM32G473 and STM32G491 are new chips of same age as I see it... also from same family with identical Reference Manual... but the world is full of miracl...

flyer31 · 2022-08-16

What a surprise, you are right ... CubeProgrammer works nicely, and also Keil uVision.Thanks a lot, this made my day... .(But it's a BIT nerving, that there seems to be no comment about this "strange behaviour" in the documentation, neither in STM32G...

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STM32G0 Reference Manual Typo (ADC-Oversampler)

Possible to use TWO circular DMA buffers for same I2C rxd?

RM error: I2C Transfer figure wrong (RELOAD bit)

Any future plans to incude USB OTG into STM32G4 (best QFN48)?

STM32G491: 100% safe Flash IAP (In Application Programming) of memory upper part only?

Re: RM error: I2C Transfer figure wrong (RELOAD bit)

Re: RM error: I2C Transfer figure wrong (RELOAD bit)

Re: Possible to use TWO circular DMA buffers for same I2C rxd?

Re: ST-Link connect ok for Nucleo_G474RE, but NOT for Nucleo_G491RE

Re: ST-Link connect ok for Nucleo_G474RE, but NOT for Nucleo_G491RE