Posted on May 17, 2011 at 13:39And my interrupt service routine looks like this...(fifo2 is a circular queue class I wrote, and xUartMgrHandle is a struct to hold the I/O queues)I'm not sure whether the ORE clear call is strictly necessary.void uart...
Posted on May 17, 2011 at 13:39Ok, I found a solution.Given the STM3210E-EVAL board and IAR Wmbedded Workbench and RTOS.The setup of the NVIC is important. With the flag NVIC_PriorityGroup_0 it does not work.I changed to NVIC_PriorityGroup_4 and it...
Posted on May 17, 2011 at 13:39That did not quite work.I put the code back to where the NVIC_PriorityGroupConfig is first. Then it fails by giving an interrupt before my structures are set up.BUT...In the debugger it does not fail, and if I put a de...
Posted on May 17, 2011 at 13:39Lookout! If you follow the example code in the Std Periph Lib, it will blow up. The sample code configures the interrupts before it configures the USART. In my case I was on USART2 on the STM3210E-EVAL kit and I get...
Posted on May 17, 2011 at 13:39One deadly possibility is that somewhere else code is defining RESET as non-zero.This will mung up the code in the Std Periph Lib big time.
