Posted on May 17, 2011 at 13:27I switched the sysclock to 72 MHz without setting flash wait states to 2. After figuring that out I corrected my code but the MCU now gets many flash download errors. The failed bits are all still 1's. Can the chip act...
Posted on May 17, 2011 at 13:27I presume you are using an external ADC, the internal one is easy to sync. You should be able to program a timer to do DMA on one edge of the timer output, and use the other edge as the start signal for your external A...
Posted on May 17, 2011 at 13:26FYI: Due to failing to set the ADC prescaler I was running the ADC at 64MHz instead of below 14MHz. At that rate about 10% (2 of 20 units) had problems with the sequencer occasionally skipping a programmed conversion. ...
Posted on May 17, 2011 at 12:19I have found Rowley support to be excellent. -- Under the target's properties try turning Adaptive Clocking OFF and set the JTAG Clock Divider to a larger number like 10 or 20. If that fixes the problem you can reduce ...
