Posted on February 05, 2008 at 11:32I used 8MHz crystal, but XTDIV2 is on, so I get 4MHz (same as having a 4MHz crystak with XTDIV2 not enabled), after this the PLL multiplies by 16 to get 64MHz, then I divide CLKSYS by 2 (my setting, for me 32MHz a...
Posted on January 31, 2008 at 19:07Hello, I solved the problem, simply by lowering the clock to 2MHz (switching from PLL 64MHz/2=32MHz to OSC4M 4MHz/2=2MHz), before calling erase functions, then raising again after. All of the CPUs that got stuck du...
Posted on January 30, 2008 at 06:35I attached the C code for better diagnosis. ****************************************************** void main(void) ... FLASH_disable_write_protection(); FLASH_erase_sectors(MAINPROGRAM_SECTORS_BANK0); FLASH_disable...
Posted on January 29, 2008 at 20:41Hello, I have a severe problem with STR752FR2, during FLASH erase. In my application, first I download a bootloader program, with a J-Link (IAR ARM compiler V5.11). All bootloader downloads go ok (50 out of 50 PCB)...
Posted on June 22, 2007 at 14:24Dear All, I have a problem with an STR752FR2 (custom HW), IAR KS + JLink. This is the code: ----------- // Enter WFI MRCC_PWRCTRL = x; MRCC_PWRCTRL = xp1; MRCC_PWRCTRL = xp1; MRCC_PWRCTRL = x; MRCC_PWRCTRL = xp1...
