Posted on May 04, 2007 at 12:39whilst the Reset pin is held low, the Address bus is definitely configured as inputs with soft pulldown as advertised, that much is measurable. However, the question is more relating to the EMI Reset register functiona...
Posted on May 04, 2007 at 07:44From page 49/262 of STR71xF microcontroller family Reference Manual UM0084: 2.6.8 Peripheral reset control register (PCU_RSTR) Bit 2 EMIRST: External Memory interface reset 0: Normal EMI operation 1: Force External M...
Posted on May 03, 2007 at 08:35Hi, I'm having some problems with the STR710FZ2T6 relating to the external memory interface. During periods of operation where other parts of our system are accessing the memory bus, we force the ARM External Mem Inter...
