Posted on May 17, 2011 at 12:08Thank you, but I know that the bus is 3.3V when it's used from CPU to external devices. My problem is to find a solution to adapt the 3.3V to 5V with bidirectional fonctionality !
Posted on May 17, 2011 at 12:08URGENT The level on P0 is strange !! we find 3.3 V an 5V signal? When we want to interface P0 with an LCD (5V bus) using SN74TVC, the uPSD is out of order. What can we do ?
Posted on May 17, 2011 at 12:06Yes, uPSD core is 3.3 V If you work with external peripheral port at 5V you have to route the pin of the bus on a PSD port and to adapt the level of rd/ an wr/. The second solution is to find a componant to adapt the 3...
