Posted on March 23, 2006 at 19:331 - Filter (R/C) the signal to a bandwidth where the interrupt latency guarantees service prior to the next bandwidth-limited transition. 2 - Connect to TWO pins one set to rising, the other falling. 3 - Set the pin ...
Posted on March 23, 2006 at 19:16PF2 does have a pullup. This is now documented in the Rev 5 (Feb 2006) version of the Data Sheet, now available from the ST72324BJ4 page.
Posted on January 11, 2006 at 01:18Is anyone using WFI to save power? We're running the ST72F324 (16k FLASH) at 6.9MHz. From the data sheet we expected about 2.1mA when executing WFI in FLASH. What we measured was 3.5mA! We changed from executing ''...
Posted on January 10, 2006 at 03:22PF2's PFOR option bit is meant to enable interrupts on the pin and not a pullup (like it does on PF0 and PF1). When I set the option bit for PF2 it pulls high and will source about 60uA which it doesn't do with the...
Posted on January 10, 2006 at 03:15From your original question: Bit 0 = OIF Oscillator interrupt flag This bit is set by hardware and cleared by software _READING_ the CSR register. It The bit is cleared by ANY read of MCCSR and ''ld a, mccsr'' is t...
