Posted on October 01, 2016 at 02:13
*** Apologies for the crosspost, I originally submitted this to the 'tools' forum instead of this one.
Hi,
These forums have been so helpful for me, but I cant seem to find the answer to a probl...
Posted on September 30, 2016 at 23:07
Hi,
These forums have been so helpful for me, but I cant seem to find the answer to a problem that has me up for days. Here's what I am trying to achieve using the HAL:
ADC1, ADC2, ADC3 simulta...
Posted on October 01, 2016 at 11:22
I solved it.
I was misreading the reference manual documentation. DMA2 Stream7, Channel7 is the TIM_TRIG channel, but this is
NOT the same as the TRGO mentioned in the HAL for triggering ADCs.
...
Posted on October 01, 2016 at 11:11Sorry for posting on the wrong topic. I don't see where to delete the post. If you're interested in the solution, I posted it [DEAD LINK /public/STe2ecommunities/mcu/Lists/cortex_mx_stm32/Flat.aspx?RootFolder=/publ...
Posted on October 01, 2016 at 02:48
I made some modifications to the code and now I am much closer.
Now:
whenever I manually trigger EGR->TG (generate trigger), the mem2mem works properly.
Whenever I trigger the EGR->UG (gen...
