Posted on June 17, 2016 at 22:09Thank you for valuable information. Clock pin usage as a clock for receiver at least explains why a capacitive load on clock influences on the read data. On recent ST seminar I was explained by a ST representative th...
Posted on June 16, 2016 at 22:06Thank you for response. First: CS starts going high one microsecond after the last clock transaction. Second: In order to simplify the test I managed to neutralize the slave peripheral holding reset all the time. MIS...
Posted on June 16, 2016 at 01:45I have the same behavior on STM3F429 SPI1. Sometimes the last bit (reading SPI) disappears (became 0 instead of 1). That happen randomly, but if I connect a scope probe to clock signal then the bit became stable 0. Th...
