Posted on April 07, 2016 at 15:24Additionally, the Manual says the following: '' For both types of memories (SRAM and flash), the intent is to generate errors during datawrite cycles, such that subsequent reads of the corrupted address locations gen...

Posted on April 06, 2016 at 17:29I've been working on this. Currently we have the problem that our software will not recover from our ECC Test on the first run after a power cycle. If we reset the software (from within UDE) the ECC Test then works a...