Trapped! - Lost SWIM Comms - (Trap = SWIMCCR = 0x01)?

tmall · ‎2010-06-09

Posted on June 10, 2010 at 01:32

#stm8 #stm8s-discovery #stm8s #stm8-swim-connect

tmall · ‎2011-05-17

Posted on May 17, 2011 at 15:09

Greetings:

It seems I am out of the trap as I have got SWIM working again. It apparently requires a POR as opposed to just a reset to recover.

With the Discovery board one needs to maintain a low on reset whilst powering up until an IDE attempt is made to enter debug mode and the comms timeout. I think the low on reset is needed to prevent the application code from incorrectly initializing the CCR regester.

After completing the aforementioned (reset & POR) procedure and releasing the reset I found SWIM worked normally with the second attempt to enter debug mode. I had changed the CCR setting in the source code back to 0x00.

I still wonder why SWIM would not work with the SWIM clock set at the faster rate which might speed up the programming. I wonder if anyone here has successfully implemented the divide by 1 rate on the Discovery Board?

Best Regards,

Tom Alldread

simonqian2 · ‎2011-05-17

Posted on May 17, 2011 at 15:09

I tested SWIMCCR =0x01, and it runs faster.

high speed, without SWIMCCR = 0x01:

Info: flash verified for 131072bytes(45.52KB/s)

high speed, with SWIMCCR = 0x01:

Info: flash verified for 131072bytes(72.48KB/s)

Wow...... It's a verrrrrrry interesting setting.

tmall · ‎2011-05-17

Posted on May 17, 2011 at 15:09

Greetings Qian:

Thank you for testing the SWIMCCR 0x01 setting and the report of much faster FLASH programming result!

Are you using the STM8S Discovery board for your STM8 platform or do you happen to have a more advanced development environment?

Best Regards,

Tom Alldread

simonqian2 · ‎2011-05-17

Posted on May 17, 2011 at 15:09

I'm using Versaloon, http://www.simonqian.com/en/Versaloon.

Code is like:

// enable double speed if supported

swim_wotf_reg(param->param[STM8_PARAM_CLK_CKDIVR], 0x00, 1);

if (param->param[STM8_PARAM_CLK_SWIMCCR] != 0)

{

swim_wotf_reg(param->param[STM8_PARAM_CLK_SWIMCCR], 0x01, 1);

swim_set_param(target_mhz, 20, 2);

}

else

{

target_mhz /= 2;

}

I check the SWIM signal, SWIMCCR default value is 0x00, which means swim clock would be HSI/2, that is 8MHz. But after I write SWIMCCR to 0x01, swim clock will be HSI, that is 16MHz. SWIM will be pull down for 8us in Sync Phase, instead of 16us. So this option simply double the SWIM clock.