Hi
I need to migrate my working STM8S003F3P6 code (working correctly for a year now) to a new STM8L051F3 chip.
(The code is SDCC compiled and bit banged with direct register modification. I do not use the SPL)
I run an interrupt at 125Hz on Timer2 in the STM8S chip that is not taking place in the Timer4 in the STM8L chip . I've set the peripheral clock ON as an extra step in the STML, but am not sure if there is any other step I'm missing. Your advise, suggestions and pointers are very much appreciated.
This is my TIM2 initialization code in the STM8S cpu that runs:
/* Prescaler = 256 */
TIM2_PSCR = 0b00001001; //prescaler for TIM2
/* Frequency = F_CLK / (2 * prescaler * (1 + ARR))
* = 16 MHz / (2 * 256 * (1 + 1952)) = 8 Hz */
TIM2_ARRH = 0x0f; /The ARR value for 16MHz clk to TIM2
TIM2_ARRL = 0x41; //0xa1;
__asm__("rim\n");
TIM2_IER |= (1 << TIM2_IER_UIE); // Enable Update Interrupt
TIM2_CR1 |= (1 << TIM2_CR1_CEN); // Enable TIM2
-------------------------------------------------------------------------------------------------------------
And this is in my STM8L initialization code that does not work properly:
----------------------
//set the STM8L051 clk TIM4 enable bit
#define TIM4CK 2
//Enable TIM4 CLK
CLK_PCKENR1 |= (1 << TIM4CK);
/* Prescaler = 256 */
TIM4_PSCR = 0b00001100; //prescaler for TIM4 to make it 4096
/* Frequency = F_CLK / (2 * prescaler * (1 + ARR))
* = 16 MHz / (2 * 4096 * (1+243)) = 8 Hz */
TIM4_ARR = 243; // The ARR value for 16MHz clk
TIM4_IER |= (1 << TIM4_IER_UIE); // Enable Update Interrupt
TIM4_CR1 |= (1 << TIM4_CR1_CEN); // Enable TIM4
The RIM instruction is taking place after this code runs
