How to declare RAM variable as volatile in STM8 assembly language

[HTiwa.11]

Hi All,

I want to know how i can declare any RAM variable as volatile in STM8 assembly language. I have one variable, which is shared between ISR and main function. It is causing issue during updates, when the software is in free run mode.

Can anyone tell me that how to declare any variable as volatile in STM8 assembly.

[berendi]

Assembly language has no concept of volatile. Variables stored in memory are accessed every time there is a load or store instruction in the code. It is the responsibility of the developer to use access patterns that are free of race conditions.

[HTiwa.11]

In the generation of executable file, C language is converted into assembly, then variables which are declared as a volatile in C code, how they are converted into assembly language ?

[berendi]

The variables are declared the same way regardless of whether they are volatile or not. Only the code accessing them will be different.

Arm assembly here, but the idea is the same.

Note that all 3 variable declarations at the bottom of the assembly code are identical, although only two of them are volatile. On the other hand, although the loops in the C code are identical, the generated assembly code is different depending on the volatile qualifiers used on the variables.

[HTiwa.11]

Thanks for your inputs

[Tesla DeLorean]

Done with a compiler.

Forces compiler to read the value every time it is used, rather than optimize, or hold in a register.

In assembler you determine how to manage the registers and loads, so if you know it needs to be read every time, you do so.

Sounds like the problem is elsewhere, better to start by understanding the interaction, and why it fails.