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STM32H562 SRAMx_ECC wrong description in CubeMX

MMeie.3
Associate II

Hi

We work on a project with a STM32H562. We use STM32CubeMX Version 6.14 with the Firmware Package V1.5.0 to generate a STM32CubeIDE project on Windows 11. I just found a wrong description in CubeMX.

The description for SRAM2_ECC, SRAM3_ECC and BKPRAM_ECC, says the parameter in CubeMX needs to be set to “Disabled” to enable ECC check.

Assuming I want to disable ECC, I would set the option to “enable” in CubeMX. CubeMX then adds OB_SRAM2_ECC_ENABLE, OB_SRAM3_ECC_ENABLE and OB_BKPRAM_ECC_ENABLE in MX_FLASH_Init(). All three options are defined in stm32h5xx_hal_falsh_ex.h as 0. According to chapter 7.11.24 of the reference manual, setting the bit to 0 in the register, enables ECC (exactly the opposite of what I wanted). Therefore, the description in CubeMX is wrong. To Disable ECC, configure Disable in CubeMX and to enable ECC, configure enable.

MMeie3_1-1744271578960.png

 

MMeie3_0-1744271548478.png

 

2 REPLIES 2
Ghofrane GSOURI
ST Employee

Hello @MMeie.3 

First let me thank you posting.

I'm currently investigating this . I will get back to you asap.

THX

Ghofrane

Ghofrane GSOURI
ST Employee

Hello @MMeie.3 

Your detailed explanation is much appreciated.

Issue has been raised to he development team for fix.

Internal ticket number 207331

THX

Ghofrane