2024-03-20 02:27 AM
On MP1, what is the fastest method communicate between A7 and M4?
2024-03-20 02:47 AM
Thanks for your question. Interprocessor communication is facilitated using shared internal SRAM and a hardware block called the IPCC (Inter processor Communication Controller). See https://wiki.st.com/stm32mpu/wiki/IPCC_internal_peripheral for more info.