ST32MP257F-DK ADC init problem

[nh7]

Hi,

I'm trying to get ADC working on ST32MP257F-DK board. There is no example in ST's sw-package and the example for ST32MP257F-EV1 board fails in HAL_ADC_Init -function giving error messages:

stm32_serc_handle_ilac:134 SERC exceptions [63:32]: 0x8000000
stm32_serc_handle_ilac:140 SERC exception ID: 59

Can somebody help, what is the difference between these boards with ADC? 

(And why there is no ADC example for ST32MP257F-DK?)

[Erwan SZYMANSKI]

Hello @nh7 ,
Could you please tell me which is the Flash image that you flashed to boot the board ? Did you use a prepared Flash image or did you make your own one ? Did you do any CubeMX configuration yourself for your device trees ? 

The error that you see is a RIF error telling you that you (M33 cortex) is not allowed to use ADC3, which is strange because M33 has access to ADC3 in all our default configuration.

Are you on OpenSTLinux v 6.1 ? 

In your Linux console, can you make a "cat /sys/kernel/debug/stm32_firewall/rifsc" and gives the output ?

Kind regards,
Erwan.

[nh7]

Hello,

I made my own image. I have some own configurations in device tree. They are mainly for spi6, should not affect ADC?

I'm using openstlinux-6.1-yocto-mickledore.

Output of "cat /sys/kernel/debug/stm32_firewall/rifsc" is in attached file.

[Pwxn]

Hello,

On the file you share we can see:

| Peripheral name || Firewall ID || N/SECURE || N/PRIVILEGED || CID filtering || Semaphore mode || SCID || SEMWL |

| ADC12 || 58 || NSEC || NPRIV || disabled || disabled || 0 || 0x0 |

| ADC3 || 59 || NSEC || NPRIV || disabled || disabled || 0 || 0x0 |

If you want to use the ADC with the M33 you need to set the Compartment IDentifier (CID) to 2. You need to reviews your configuration. If you use CubeMX you can quickly see which CID is set for your peripherals as you configure their pinout.  

Finally, you can refer to the RM0457 9.4.6 RIFSC control of peripherals (RISUP) for more details.

I hope this will help you.

Regards,

[nh7]

Hello,

CubeMX looks the same here. Can you tell me which file to edit to get this CID configured?

[Pwxn]

Hello,

In the device tree of OPTEE you will find the <machine>-<project>-rif.dtsi

&rifsc {
	st,protreg = <
		RIFPROT(STM32MP25_RIFSC_ADC12_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_PRIV, RIF_CID1, RIF_SEM_DIS, RIF_CFEN)
		RIFPROT(STM32MP25_RIFSC_ADC3_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID2, RIF_SEM_DIS, RIF_CFEN)

You can modify it manually.

Regards, 

[GatienC]

Hi,

I think there is a confusion between IAC and SERC events here.

SERC events occur when there is an access to a peripheral whose clock is disabled or is under reset. This is not related to RIF firewall configuration.

On the other hand, the clock access configuration depends on the ADC RIF configuration. Therefore, if you want to enable the clock, then the ADC must be accessible by the context trying to enable it.

To conclude: please check the clock state of the ADC: (RCC_ADC12CFGR) or (RCC_ADC3CFGR) registers

Best regards,

Gatien

[GatienC]

https://wiki.st.com/stm32mpu/wiki/How_to_analyze_IAC_%26_SERC_errors is worth mentioning as well.