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STM32MP157CAA3 LCD ili9881 coupling

MWoło.2
Senior II

Hi,

I try to couple LCD TFT ili9881c (mipi dsi 2 lanes interface) with stm32mp157caa3.

My custom driver seems to be loading correctly.

When I type lsmod I get

Module                  Size  Used by                                           
cfg80211              651264  0                                                 
usb_f_rndis            24576  2                                                 
u_ether                20480  1 usb_f_rndis                                     
libcomposite           49152  10 usb_f_rndis                                    
galcore               516096  2                                                 
panel_ilitek_ili9881c    20480  0                                               
dwmac_stm32            16384  0                                                 
stmmac_platform        20480  1 dwmac_stm32                                     
stm32_adc_core         20480  0                                                 
spi_stm32              24576  0                                                 
sch_fq_codel           20480  3                                                 
ip_tables              24576  0                                                 
x_tables               24576  1 ip_tables                                       
ipv6                  512000  42

Unfortunately, the display is not working, only the backlight is working.

I checked twice the dts and looks good, driver is loading well. I can't find anything with 'drm'. What I missed? Shall I add some additional driver in the kernel or something install in the roofs?

In the log, I can see only

[    0.079013] platform 5a000000.dsi: Fixing up cyclic dependency with 5a001000.display-controller

and

[   13.730531] [drm] Initialized stm 1.0.0 20170330 for 5a001000.display-controller on minor 0

1 ACCEPTED SOLUTION

Accepted Solutions
MWoło.2
Senior II

I think I can close this topic. The real problem is related with display itself. STM32MP1x support only 2 lane displays. My display have 4 lane and it can't be reconfigured by software to 2 lane - missing access to IM pins. So I think mipi works but the display can't be handled by 2 lanes.

View solution in original post

16 REPLIES 16
Erwan SZYMANSKI
ST Employee

Hello @Michał Wołowik​ ,

Can you tell me on which linux version you are working on ? 5.10 or 5.15 (DV 3.1 or 4.1 ?)

You mentioned your "custom driver" for ili9881 panel. Does it mean that you did not take the one upstreamed under <linux_folder>/drivers//gpu/drm/panel/panel-ilitek-ili9881c.c ?

Can you also share your device tree ?

Kind regards,

Erwan.

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MWoło.2
Senior II

Hi Erwan,

I also measure clk and data lines, completely silent on all.

Here are my dts, defconfig and modified panel-ilitek-ili9881c.c

Latest Openstlinux 4.1 kernel 5.15.

I used the original driver but with my own initialization list and other parameters.

MWoło.2
Senior II

I also check other not modified drivers, the result is the same.

Nothing on the MIPI lines and in the log.

/* compatible = "winstar,WF50DTYA3MNG10", "ilitek,ili9881c"; */
		compatible = "raydium,rm68200";

 I think I missed something due I start designing dts from Cube Mx.

Hello @Michał Wołowik​,

Looking at your shared files, I do not see obvious issue that can explain your problem.

Are you working on a custom board or is it the stm32mp157c-dk2 board ?

Just to get a little bit more information, we can take a look at the following things:

  • adding drm.debug="0xff" in Linux Kernel command line to have complete traces of DRM, that can give us some tips (dmesg log level should be as high too to see the logs)
  • getting the cat /sys/kernel/debug/clk/clk_summary to check if dsi/ltdc cllks are well prepared and enabled.
  • getting the modetest -M stm output to check if the connectors etc.. are well recognized by the system.

Kind regards,

Erwan.

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MWoło.2
Senior II

Hi Erwan,

I added logs in the attachment.

This is not DK2 it's my custom board.

In my previous version, I get some errors that the clock is invalid, etc. Here is nothing, it's strange to me.

BR Michal

Erwan SZYMANSKI
ST Employee

Hello @Michał Wołowik​ ,

Are you able to probe the different signals in entry of your panel ?

Do you see the pixel clock etc or nothing ?

Can you provide a full boot log file with "dmsg" command ?

Kind regards,

Erwan.

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@Michał Wołowik​ ,

Sorry for the DRM logs I was not really clear. In fact I would like to see the DRM logs at boot time.

You can enable it with adding "drm.debug=0x2" in the Linux commandline (0x2 will display drivers message only).

In ST deliveries, we can modify it on bootfs partition in extlinux.conf files.

For example, with my stm32mp157f-dk2 I will have:

root@stm32mp1:/boot/mmc0_extlinux# cat stm32mp157f-dk2_extlinux.conf
 
# Generic Distro Configuration file generated by OpenEmbedded
menu title Select the boot mode
MENU BACKGROUND /splash.bmp
TIMEOUT 20
DEFAULT OpenSTLinux
LABEL OpenSTLinux
        KERNEL /uImage
        FDTDIR /
        INITRD /uInitrd
        APPEND root=PARTUUID=e91c4e10-16e6-4c0e-bd0e-77becf4a3582 rootwait rw console=ttySTM0,115200 drm.debug=0x2
LABEL stm32mp157f-dk2-a7-examples
        KERNEL /uImage
        FDT /stm32mp157f-dk2-a7-examples.dtb
        INITRD /uInitrd
        APPEND root=PARTUUID=e91c4e10-16e6-4c0e-bd0e-77becf4a3582 rootwait rw console=ttySTM0,115200
LABEL stm32mp157f-dk2-m4-examples
        KERNEL /uImage
        FDT /stm32mp157f-dk2-m4-examples.dtb
        INITRD /uInitrd
        APPEND root=PARTUUID=e91c4e10-16e6-4c0e-bd0e-77becf4a3582 rootwait rw console=ttySTM0,115200

and at boot time, the following DRM traces are displayed:

[    0.000000] Kernel command line: root=PARTUUID=e91c4e10-16e6-4c0e-bd0e-77becf4a3582 rootwait rw console=ttySTM0,115200 drm.debug=0x2
[    3.118656] [drm:ltdc_load] 
[    3.662669] [drm:ltdc_load] 
[    4.219836] [drm:ltdc_load] 
[    4.219954] [drm:ltdc_load] Bridge encoder:31 created
[    4.220011] [drm:ltdc_load] Bridge encoder:33 created
[    4.220201] [drm:ltdc_load] ltdc hw version 0x00010300
[    4.220839] [drm:ltdc_plane_create] plane:35 created
[    4.220869] [drm:ltdc_load] CRTC:37 created
[    4.220890] [drm:ltdc_plane_create] plane:38 created
[    4.220898] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
[    4.226124] [drm] Driver supports precise vblank timestamp query.
[    4.233250] [drm] Initialized stm 1.0.0 20170330 for 5a001000.display-controller on minor 0
[    9.915889] [drm:ltdc_crtc_mode_valid] clk rate target 29700000, available 29700000
[    9.945755] [drm:ltdc_crtc_mode_valid] clk rate target 29700000, available 29700000
[    9.945787] [drm:ltdc_crtc_mode_fixup] requested clock 29700kHz, adjusted clock 29700kHz
[    9.945799] [drm:ltdc_plane_atomic_check] 
[    9.945815] [drm:ltdc_plane_atomic_check] plane:35 fb:40 (480x800)@(0,0) -> (480x800)@(0,0)
[    9.945873] [drm:drv_runtime_resume] 
[    9.945882] [drm:ltdc_resume] 
[    9.945912] [drm:ltdc_crtc_mode_set_nofb] CRTC:37 mode:480x800
[    9.945923] [drm:ltdc_crtc_mode_set_nofb] Video mode: 480x800
[    9.945954] [drm:ltdc_crtc_mode_set_nofb]  hfp 98 hbp 98 hsl 32 vfp 15 vbp 14 vsl 10
[    9.945975] [drm:ltdc_encoder_mode_set] 
[    9.946107] [drm:dw_mipi_dsi_get_lane_mbps] pll_in 24000kHz pll_out 428000kHz lane_mbps 428MHz
[    9.958729] [drm:dw_mipi_dsi_mode_set] failed to wait phy lock state
[   10.015631] [drm:ltdc_plane_atomic_update] fb: phys 0xd2200000
[   10.015650] [drm:ltdc_crtc_enable_vblank] 
[   10.015686] [drm:ltdc_crtc_atomic_enable] 
[   10.814514] [drm:ltdc_encoder_enable] 
[   10.814534] [drm:dw_mipi_dsi_phy_power_on] 
[   15.845557] [drm:ltdc_crtc_disable_vblank] 

Kind regards,

Erwan.

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MWoło.2
Senior II

Hi Erwan,

drm boot log

root@stm32mp1-computer-lcd:~# dmesg | grep drm
[    0.000000] Kernel command line: root=PARTUUID=491f6117-415d-4f53-88c9-6e0de54deac6 rootwait rw drm.debug="0x02" console=ttySTM0,115200
[    0.500555] [drm:ltdc_load] 
[    2.249006] [drm:ltdc_load] 
[    2.249178] [drm:ltdc_load] Bridge encoder:31 created
[    2.249483] [drm:ltdc_load] ltdc hw version 0x00010300
[    2.267527] [drm:ltdc_plane_create] plane:33 created
[    2.267605] [drm:ltdc_crtc_init] CRTC:37 created
[    2.267645] [drm:ltdc_plane_create] plane:38 created
[    2.278255] [drm] Initialized stm 1.0.0 20170330 for 5a001000.display-controller on minor 0
[    9.426142] systemd[1]: Starting Load Kernel Module drm...
[   10.745919] [drm:ltdc_crtc_mode_valid] clk rate target 54000000, available 54000000
[   10.792624] [drm:ltdc_crtc_mode_valid] clk rate target 54000000, available 54000000
[   10.792725] [drm:ltdc_crtc_mode_fixup] requested clock 54000kHz, adjusted clock 54000kHz
[   10.792754] [drm:ltdc_plane_atomic_check] 
[   10.792827] [drm:drv_runtime_resume] 
[   10.792863] [drm:ltdc_resume] 
[   10.792914] [drm:ltdc_crtc_mode_set_nofb] CRTC:37 mode:720x1280
[   10.792938] [drm:ltdc_crtc_mode_set_nofb] Video mode: 720x1280
[   10.792960] [drm:ltdc_crtc_mode_set_nofb]  hfp 48 hbp 48 hsl 9 vfp 12 vbp 12 vsl 5
[   10.793045] [drm:ltdc_encoder_mode_set] 
[   10.793146] [drm:dw_mipi_dsi_get_lane_mbps] pll_in 24000kHz pll_out 776000kHz lane_mbps 776MHz
[   10.807297] [drm:dw_mipi_dsi_mode_set] failed to wait phy lock state
[   10.867439] [drm:dw_mipi_dsi_phy_power_on] 
[   10.867508] [drm:ltdc_plane_atomic_update] plane:33 fb:42 (720x1280)@(0,0) -> (720x1280)@(0,0)
[   10.867575] [drm:ltdc_plane_atomic_update] fb: phys 0xc3900000
[   10.867615] [drm:ltdc_crtc_atomic_enable] 
[   11.257293] [drm:ltdc_encoder_enable] 
[   11.257376] [drm:ltdc_crtc_enable_vblank] 
[   16.317225] [drm:ltdc_crtc_disable_vblank] 
[   18.130419] [drm:ltdc_plane_atomic_check] 
[   18.130532] [drm:drm_atomic_helper_commit_planes] CRTC:37 plane:33
[   18.130579] [drm:ltdc_crtc_enable_vblank] 
[   23.197261] [drm:ltdc_crtc_disable_vblank] 
[   27.588309] [drm:ltdc_crtc_mode_valid] clk rate target 54000000, available 54000000
[   27.695429] [drm:ltdc_plane_atomic_check] 
[   27.695491] [drm:ltdc_plane_atomic_check] 
[   27.749367] [drm:ltdc_plane_atomic_check] 
[   27.749426] [drm:ltdc_plane_atomic_check] 
[   27.749556] [drm:ltdc_plane_atomic_update] plane:33 fb:42 (720x1280)@(0,0) -> (720x1280)@(0,0)
[   27.749634] [drm:ltdc_plane_atomic_update] fb: phys 0xce400000
[   27.749669] [drm:ltdc_crtc_enable_vblank] 
[   29.098611] [drm:ltdc_plane_atomic_check] 
[   29.343705] [drm:ltdc_plane_atomic_check] 
[   29.343911] [drm:ltdc_plane_atomic_update] plane:33 fb:43 (720x1280)@(0,0) -> (720x1280)@(0,0)

full log in the attachment.

BR Michal

MWoło.2
Senior II

Hi Erwan,

unfortunately, I have nothing on dsi lines completely silent.

Please check my ioc, I have a feeling I missed something.

Thanks

BR Michal