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STM32MP151 emmc OTP configure

fantasylsdo
Associate II

Hello. We already have a custom board based on STM32MP151CAD3 with an eMMC. The following pins are different with default eMMC pins.

SDMMC2_CMD: PA0

SDMMC2_D1: PB7

 

As not default pins are used, we need to update OTP value. Here are my result.

 

OTP3 = 0x00000004

emmc_if_id=2: SDMMC2(uses non default AFmux defined in OTP).

OTP5 = 0x27A41094

SDMMC2_CMD = PA0 (bits[15:0]: port0=1=GPIOA, pin0=0, afmux0=9, mode0=4=AF;pull-up;medium-speed)

SDMMC2_D1 = PB7 (bits[31:16]: port1=2=GPIOB, pin1=7, afmux1=10, mode1=4=AF;pull-up;medium-speed)

However, it does not work. I also trace its ROM log. Attached is log.

1 ACCEPTED SOLUTION

Accepted Solutions

Hi @fantasylsdo ,

I think the issue is that you are using STM32MP15x Rev B. (from a very old stock I guess) which have issue booting from most eMMC due to too short data timeout.

Please refer to ES0438.

You must use STM32MP15 Rev. Z devices.

As a workaround, few eMMC was identified as working with Rev. B (Toshiba THGBMNG5D1LBAIL, THGBMDG5D1LBAIL, and Kingston EMMC04G-M627-X03U)

Please confirm your device version looking at package marking (or printed on console log during flash programming).

 

Regards.

In order to give better visibility on the answered topics, please click on 'Accept as Solution' on the reply which solved your issue or answered your question.

View solution in original post

6 REPLIES 6
PatrickF
ST Employee

Hi @fantasylsdo ,

as soon you set OTP3 to use non-default AFmux, you should define ALL the required pins by the BootROM.
Here you miss to define CLK and D0. Note: D1 is useless for eMMC at BootROM stage.

So, your OTP shoud look like:

  • OTP3: 0x00000004
  • OTP5: 0x10945391
  • OTP6: 0x00002E94

(please double check values according to your needs)

Regards.

In order to give better visibility on the answered topics, please click on 'Accept as Solution' on the reply which solved your issue or answered your question.

Hi Patrick. Thanks for your reply. 

I have a question about OTP5: 0x10945391. The mode of CLK is configured as 1 (no pull; medium speed). But I find in this link https://community.st.com/t5/stm32-mpu-products/changing-the-emmc-pins-with-otp/td-p/155797. The mode of CLK is configured as 4 (pull up; medium speed). Does it matter?

 

 

 

 

HI @fantasylsdo 

Internal pull-up on CLK is not so important as it is driven push-pull once initialized. Usually there is also an external pull-up.

Both configuration will work.

Regards.

In order to give better visibility on the answered topics, please click on 'Accept as Solution' on the reply which solved your issue or answered your question.

Hi Patrick,

Thanks very much for fast and clear explanation. I appreciate it.

I tried it and found another issue. Regarding the ROM trace log, an error "MMC_NotEnoughBootDataRxErr" occurs. Attached is trace log and TSV file.

Do you know its cause?

Hi @fantasylsdo ,

I think the issue is that you are using STM32MP15x Rev B. (from a very old stock I guess) which have issue booting from most eMMC due to too short data timeout.

Please refer to ES0438.

You must use STM32MP15 Rev. Z devices.

As a workaround, few eMMC was identified as working with Rev. B (Toshiba THGBMNG5D1LBAIL, THGBMDG5D1LBAIL, and Kingston EMMC04G-M627-X03U)

Please confirm your device version looking at package marking (or printed on console log during flash programming).

 

Regards.

In order to give better visibility on the answered topics, please click on 'Accept as Solution' on the reply which solved your issue or answered your question.

Hi Pactrick, 

You are correct. I'm using  STM32MP151CAD Rev.B. Thanks for your kind advice. We will consider to change STM32MP15 Rev. Z devices.

Thanks for your efficient reply again.  I'll close this question.