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QuadSPI Data Line Default State Issue

Stnoobs
Associate II

I am trying to operate two devices using QuadSPI in the STM32MP131 bare-metal environment. Currently, an external Flash is being used in QuadSPI Bank1 in dual mode, and I am attempting to use another external device in Bank2 in quad mode.

The issue I encountered is that while the Flash connected to Bank1 operates normally, a problem occurs when transmitting data to Bank2. Upon inspecting with an oscilloscope, the data itself is transmitted correctly, but the default state of the BK IO3 pin is always fixed to High. Since the external device receives data from QuadSPI without any filtering, the fact that IO3 is fixed to High can cause malfunction. *This device does not require separate NCS or WP pins.

 

 

The image below is a measurement taken when 0x01 was transmitted to BK2 using 4-line Quadmode.

Although 0x01 is transmitted correctly, you can see that the state of IO3 returns to High again.

Stnoobs_0-1726122675318.png

 

To prevent any potential issues, the qspi-related code that activates the Flash has been disabled.

 

Below is the relevant code.

 

 

 

 

uint8_t qspiInit(void)
{
	uint8_t ret = TRUE;

	__HAL_RCC_QSPI_FORCE_RESET();
	__HAL_RCC_QSPI_RELEASE_RESET();

	if(qspiParamInit()!=TRUE)
	{
		return QSPI_INIT_FAIL;
	}
	isInit = TRUE;

	return ret;
}


static uint8_t qspiParamInit(void)
{
    uint8_t ret = TRUE;

	hxspi.Instance 		           = QUADSPI;
    hxspi.Init.ClockPrescaler 	 	   = 120;
    hxspi.Init.FifoThresholdByte 	   = 4;
    hxspi.Init.SampleShifting 	 	   = XSPI_SAMPLE_SHIFTING_NONE;
    hxspi.Init.MemorySize 		   = 23-1;				
    hxspi.Init.ChipSelectHighTimeCycle     = 1;
    hxspi.Init.ClockMode 		   = XSPI_CLOCK_MODE_0;
    hxspi.Init.MemoryMode 		   = HAL_XSPI_SINGLE_MEM;

    if (HAL_XSPI_Init(&hxspi) != HAL_OK) {
    	ret = FALSE;
    }

    return ret;
}



XSPI_RegularCmdTypeDef qdev;
uint8_t qspiDev_Init(void)
{
	uint8_t ret = TRUE;
	if(qspiIsinit()!=TRUE)
	{
		ret = qspiInit();
		if(ret !=TRUE)
			return QSPI_INIT_FAIL;
	}



	qdev.Instruction 	 = 0;			
	qdev.InstructionMode	 = XSPI_INSTRUCTION_NONE;		
	qdev.AddressMode 	 = XSPI_ADDRESS_NONE;			
	qdev.AddressWidth 	 = XSPI_ADDRESS_24_BITS; 		
	qdev.Address 		 = 0;
	qdev.AlternateByteMode   = XSPI_ALT_BYTES_NONE;
	qdev.DTRMode 		 = XSPI_DTR_MODE_DISABLE;
	qdev.DelayHoldHalfCycle  = XSPI_DHHC_ANALOG_DELAY;
	qdev.SIOOMode 		 = XSPI_SIOO_INST_EVERY_CMD;
	qdev.DataMode 		 = XSPI_DATA_4_LINES;			
	qdev.DummyCycles 	 = 0;						
	qdev.IOSelect 		 = HAL_XSPI_SELECT_IO_7_4;	
	qdev.DataLength 	 = 1;


	if (HAL_XSPI_Command(&hxspi, &qdev, HAL_XSPI_TIMEOUT_DEFAULT_VALUE)!= HAL_OK)
	{
		return FALSE;
	}

	isInit = TRUE;

	return ret;

}


/*1byte Write*/
uint8_t qdev_WriteByte(uint8_t data)
{
    uint8_t ret = TRUE;


	/* Transmission of the data */
      if (HAL_XSPI_Transmit(&hxspi, &data, HAL_XSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
      {
          return FALSE;
      }

      return ret;

}

 

 

 

 

 

Best regards.

4 REPLIES 4
PatrickF
ST Employee

Hi @Stnoobs 

any pull-up on the PCB or inside the memory on IO3 (or HOLD pin) ?

Regards.

In order to give better visibility on the answered topics, please click on 'Accept as Solution' on the reply which solved your issue or answered your question.

When power is initially applied, IO3 remains in a Low state and is not pulled up on the PCB.

In the CubeMX settings, it is configured as No PUPD (no pull-up/pull-down).

After transmitting data, it becomes fixed in a High state.

Additionally, there is something strange with the PF9 pin, which operates as BK1 IO1 and BK2 IO3.

When this pin is set as BK1 IO1 and 4-line data is transmitted, it returns to the normal Low state after data transmission. However, when configured as BK2 IO3 and data is transmitted, it becomes fixed in a High state after transmission.

Given this, I believe it is not a circuit issue.

 

Hi,

I'm not expert on QUADSPI, but I think at then end of transfer, the IOs should go in Hi-Z.
Did you check the NCS going high ?
Did you try a pull-down ?

Maybe check that a byte write is effectively done to QUADSPI_DR register (and not 32-bit value).

Regards

In order to give better visibility on the answered topics, please click on 'Accept as Solution' on the reply which solved your issue or answered your question.

I have tried changing the internal PUPD settings, but there is no change.

I checked the DR register inside HAL_XSPI_Transmit , and although the value is always 0, the data output is performed correctly. Even when sending 0x00, the pin only stays in a Low state during transmission, but once the transmission is complete, it is always fixed in a High state.

As mentioned earlier, the pin switches to a Low state correctly in BK1 mode, but when switched to BK2 mode, it stays in a High state.