How to Wake up STM32MP157AAD3 from LPLV-Stop mode?

JG.2 · ‎2022-04-04

Our board is similar to STM32MP157C-DK2 Disco board - All the Developer packages has been installed, At the initial FSBL stage itself board is not booting whereas required power supply is provided, In which the Voltage (VDDCORE_1V2) value related to DDR circuit has fallen below Threshold voltage to 0.88V , so the voltages related to it has also went down to 0v. What is the solution to wake up the MPU ?

PatrickF · ‎2022-04-04

Hi @JG.2 ,

VDDCORE should be 1.2V to boot the system. If falling at 0.88V during boot (i.e. no entry in low-power mode is requested during FSBL boot) it should be over-current detected by the STPMIC1 on this supply. Please check your schematics.

VDDCORE is not related to DDR supply.

Any console message at FSBL startup ?

Regards.

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JG.2 · ‎2022-04-05

There is no Console message is displayed , How to bring back the board to Run mode?

Is it possible either only by using Hardware or by Firmware.

PatrickF · ‎2022-04-05

Hi,

I think the board is not in low-power mode (TF-A will not do that by their own, especially during cold boot). maybe TF-A is even not loaded/started by the BootROM if power is not at required level.

You have probably an HW issue which make your VDDCORE voltage fail (STPMIC1 external components ? Too high power consumption ? schematic issue ? board issue ?).

If you set BOOT pins to 0b000 (Serial mode), did you see USB High-Speed OTG (USB_DP2/DM2 pins) DFU enumerated on your PC ? As this will only involve BootROM, it is a first step to check correct HW before going further with SD-Card.

Regards.

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BG.3 · ‎2022-04-30

Hi @PatrickF,

I am @JG 's colleague. As the continuation of the above case, We are clear that there was a HW issue that made VDDCORE go below its threshold voltage (0.88V).

As per the datasheet of the processor, we can know that when VDDCORE_1V2 reduced to 0.8-0.9V, that means LPLV mode. And there were no clock signals at any clock line.

If we want to make the VDDCORE of STPMIC1APQR to 1.2V. What should we do? And there is no console data. Can the PONKEY pin of the STPMIC1APQR, be used to regain the run mode? or Is it possible to restore the VDDCORE to its normal value by triggering its I2CSDA/I2CSCL of STPMIC1APQR?

What initiates the board into LPLV mode, whether processor or PMIC?

PatrickF · ‎2022-05-02

Hi @BG.3 ,

going to LPLV-Stop with STM32MP15x and STPMIC1 requires some SW steps.

setup the STPMIC1 behavior for each platform Buck/LDO when PWRCTRL=0 (this pin should be tied to PWR_ON of STM32MP15x).
- Application SW should write using I2C in STPMIC1 'Alternate' registers (refer to STPMIC1 datasheet)
set STM32MP15 PWR_ON pin to 0. This is done under SW control (then STM32MP15 PWR HW) when going to right low power mode (refer to STM32MP15 Reference Manual, PWR section)

In our started package, this is managed by TF-A under Linux low power mode request

See https://wiki.st.com/stm32mpu/wiki/Power_overview#How_to_enter_and_exit_low-power_modes

Exit from low power mode depend on which low power mode is requested.

Obviously, the wakeup source should be enabled by SW before going to low power.

For LPLV-Stop, as per STM32MP15 Reference Manual, it could be: WKUP pins, RTC alarm, RTC wakeup, tamper event, time stamp event, Application reset (NRST, IWDG, ...). See also AN5109.

e.g. If correctly programmed before going to low power, the STPMIC1 PONKEYn could generate an STPMIC1 INTn which is connected to a WKPx pin.

On our DK1/DK2 or EV1 platform STPMIC INTn is connectd to PA0 as WKUP1 input.

Anyway, I'm puzzle that you mention many times that you don't have any console data, this could mean that you never boot up your platform. Could you confirm which SW are your running (and maybe first solve the console log issue).

The platform cannot go into any low power mode without SW up and running with specific actions.

Regards.

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BG.3 · ‎2022-05-07

Hi @PatrickF (ST Employee),

Initially, our platform was booting up. When the application was running, suddenly it stopped. And the device never boots up again. Then the VDDCORE_1V2 was reduced to 0.88V. After that, we could not see any console data.

Yocto Linux is our platform's baseline.

Do you mean, even in LPLV mode, the MPU can give console messages? If so, how does the VDDCORE_1V2 go down to less than its threshold for only a few boards? If PMIC realised high current and the platform was not booting, how to improve VDDCORE_1V2 from 0.9 to 1.2V?