2026-05-10 3:19 PM - edited 2026-05-10 3:22 PM
Hi!
I have a custom board with 2GB RAM instead of 4GB RAM. Yes, I have configured 2GB in CubeMX and generated the new DT.
Check it out here: https://github.com/DanielMartensson/Watermelon-Wine-1A/tree/linux-testing/watermelon-wine-os%2Flayers%2Fmeta-watermelon-wine%2Fmx%2Fwatermelon-wine-1a
It seems that the booting process passes TF-A without any issues. But it fails at the optee boot process.
F/TC:0 0 regulator_enable:94 v3v3
F/TC:0 0 regulator_enable:94 v5v_vconn
[ 0.000000] SCP-firmware 2.13.0-intree-optee-os-4.0.0-dev
[ 0.000000]
[ 0.000000] [FWK] Module initialization complete!
F/TC:0 0 regulator_set_voltage:202 vddcpu 800000uV
F/TC:0 0 lock_i2c_bus_access:796 thread access
F/TC:0 0 unlock_i2c_bus_access:837 thread access completed
F/TC:0 0 stpmic2_register_read:259 REG[0x20 v=0x1e
F/TC:0 0 pmic_get_voltage:192 vddcpu: get voltage: 800000 uV
F/TC:0 0 pwr_get_state:243 vddgpu: get state
D/TC:0 0 set_opp:60 set volt to 800000uV
F/TC:0 0 regulator_set_voltage:202 vddgpu 800000uV
F/TC:0 0 pwr_get_voltage:279 vddgpu: get volt
F/TC:0 0 lock_i2c_bus_access:796 thread access
F/TC:0 0 unlock_i2c_bus_access:837 thread access completed
F/TC:0 0 stpmic2_register_read:259 REG[0x2a v=0x1e
F/TC:0 0 pmic_get_voltage:192 vddgpu_pmic: get voltage: 800000 uV
D/TC:0 0 set_opp:67 set clock to 800000kHz
I/TC: Primary CPU switching to normal world boot
INFO: BL31: Preparing for EL3 exit to normal world
INFO: Entry point address = 0x84000000
INFO: SPSR = 0x3c9
E/TC:0 stm32_serc_handle_ilac:133 SERC exceptions [63:32]: 0x1
E/TC:0 stm32_serc_handle_ilac:139 SERC exception ID: 32
E/TC:0 stm32_iac_itr:192 IAC exceptions [159:128]: 0x200
E/TC:0 stm32_iac_itr:197 IAC exception ID: 137
I/TC:
DUMPING DATA FOR risaf@420d0000
I/TC: =====================================================
I/TC: Status register (IAESR0): 0x91
I/TC: -----------------------------------------------------
I/TC: Faulty address (IADDR0): 0x83ffff80
I/TC: =====================================================
E/TC:0 Panic at /usr/src/debug/optee-os-stm32mp/4.0.0-stm32mp-r3/core/drivers/firewall/stm32_iac.c:212 <stm32_iac_itr>
E/TC:0 TEE load address @ 0x82000000
E/TC:0 Call stack:
E/TC:0 0x82008180
E/TC:0 0x820473cc
E/TC:0 0x82030028
E/TC:0 0x82044d44
E/TC:0 0x82014bf8One thing that I have found, is that this seems to be and old issue. This has been discussed here:
https://www.mail-archive.com/u-boot%40lists.denx.de/msg565119.html
Questions:
Se attached file.
Solved! Go to Solution.
2026-05-11 5:30 AM
Hi,
I'm not expert of RIF, but status seems to show that a CID1 (Cortex-A35) non-secure privileged code is trying to write at 0x83ffff80 whereas this area is likely defined in RISAF4 as restricted to secure write access only.
Regards.
2026-05-11 2:06 AM - edited 2026-05-11 2:31 AM
Hi @DMårt
IAC event is related to security illegal access issue (RIF setting related).
according to RM0457, ID 137 is "RISAF4 (DDR-SDRAM)"
SERC event is related to SW accessing an IP which is not clocked.
according to RM0457, ID 32 is USART2
Regards.
2026-05-11 2:29 AM
Thank you!
Did you mean RM0457?
2026-05-11 2:31 AM
yes RM0457 (post edited)
2026-05-11 2:54 AM
Thank you. Can you post which page you found these IDs?
The only information i have found is from chapter 11.5.5, page 402.
2026-05-11 2:58 AM
RM0457 Rev5
page 349
page 5760
2026-05-11 4:22 AM
Thank you!
I don't know why IAC 137 is happening. The SERC was caused by a &usart2 node was pasted in addons in the DT of optee.
If you ok at page 402. The fields I have got are: IANRW = 1, IASEC = 0, IAPRIV = 1, IACID = 1. Which is 0x91.
I using 100% the same RIF konfiguration as the STM32MP257F-DK.
Do you have any suggestions what I need to investigate more?
2026-05-11 5:30 AM
Hi,
I'm not expert of RIF, but status seems to show that a CID1 (Cortex-A35) non-secure privileged code is trying to write at 0x83ffff80 whereas this area is likely defined in RISAF4 as restricted to secure write access only.
Regards.