STM32MP157A-DK1 Enabling and reading STGEN.

[dziq]

Hi, I am working with STM32MP157A-DK1 board with Yocto build system.
I am trying to build synchronised system, that means I want to synchronise both CortexA7 and CortexM4. Basically I want to have the same time at both of them. I want to use STGEN for that, read it's counter on both A7 and M4 and share the values to calculate difference.

And here is my question, how can I enable STGEN in my own linux image (I am not using OpenSt distribution right now). My image is basing on core image minimal.
When I try to read STGENR registers provided in RM0436 with that piece of code (it is executed by M4):

#include "stgen_read.h"
#include "openamp.h"

#define STGENR_BASE_ADDR 0x5A005000UL
#define STGENR_CNTCVL_OFFSET 0x000
#define STGENR_CNTCVU_OFFSET 0x004

#define STGENR_CNTCVL_REG (*(volatile uint32_t *) (STGENR_BASE_ADDR + STGENR_CNTCVL_OFFSET))
#define STGENR_CNTCVU_REG (*(volatile uint32_t *) (STGENR_BASE_ADDR + STGENR_CNTCVU_OFFSET))

#Debug purpose
extern struct rpmsg_endpoint ept;


uint64_t stgen_get_counter() {
	uint32_t low, high, high_comp;

	do {
		high = STGENR_CNTCVU_REG;
		low = STGENR_CNTCVL_REG;
		high_comp = STGENR_CNTCVU_REG;
	} while (high != high_comp);

        //temporary debug purpose
	if (low == 0 || high == 0)
	{
		stgen_packet packet;
		packet.type = 0xBB;    #This means error packet
		packet.data = 1;
		rpmsg_trysend(&ept, &packet, sizeof(packet));
	}
        // end of debug

	return ((uint64_t)high << 32) | low;
}

I am always getting 0, basically this debug part is always executing.

I was trying to change STGEN access mode from secure to non-secure mode in ETZPC properties, in tf-a device tree, but at startup system is always in PANIC like here:

I also tried to add my own stgen node in kernel device tree but it didn't work. I will be grateful for any help and advice:).

Thank you in advance, please let me know if there is something that I can provide to make problem more clear.

[GatienC · Accepted solution]

Hello,

Can you make sure that the RCC_MC_APB4ENSETR.STGENROEN is set?

The STGENR doesn't need to be secured, yes. And it should not in your case.

Without more debug information, the TF-A log is a bit hard to speculate from.

I hope this helps,

Gatien

[dziq]

Hi, you are right, setting the RCC_MC_APB4ENSETR.STGENROEN (writing 0x00100000 to 0x50000200) gives positive outcome and now counter registers of STGEN can be read. Thank you for pointing that and your time for helping me.

In addition I also wanted to change the frequency of STGEN from 24 [MHz] to 64 [MHz], it means changing clocking signal from HSE to HSI. It can be done only from secure mode so if you want to do that you need to modify TF-A and optee device trees. I found that in st,pkcs property in rcc node in one of the dtsi files . Maybe that will be useful for somebody.

[GatienC]

Are you sure you want to switch to HSI? STGEN boots on HSI by default and we switch it to HSE as per recommendations of ARM for generic timer source. The reason is it needs a stable clock source.

[dziq]

On one side I am sure because I am doing that in research purpose.

On the other hand if it affects other clocks, especially those that can affect time accuracy and stability on A7 (my main concern is CLOCK_REALTIME) it is something that I need to focus and read more about.

Do you know how switching from HSE to HSI can affect the system in general?
Also, if HSI is wrong for work of system, is this possible to have another sync source with ns resolution (less than HSE)? For example configuring TIMx at M4 side, will it be possible to read it's value from A7?

Thanks ;)

[GatienC]

HSI is more prone to derivation. Therefore, you may face small variations in functions like delay()..

Regarding the clock source, the RCC chapter of the reference manual mention two clock sources HSI and HSE. What is the HSE frequency? Because 24MHz is in the tens of nanoseconds range? Do you need less?

For HSI, there is a calibration service available nevertheless: Activation of HSI calibration service .

I'm not an expert in timers so I won't be able to help there sorry.

Best regards,

Gatien