STM32MP135F qspi nand boot and OTP configuration

[Patsaoglou]

Hello ST team.

I am working on the boot chain from qspi NAND flash memory. The board is based on the STM32MP135F SOC and the w25n01gvzeig winbond 128MB IC. The IC is sitting on qspi bank 1 on the default BOOTROM pins (AN5474 p49).

I have already succeeded the bootchain for EMMC and USB uboot successfully locates and flashes the nand with the partitions I have specified. But as set the boot pins to 111 I get 0 logs from the serial.

By reading in the forum I suspect that the OTP should be programmed with the NAND layout configuration but I would like to be sure. Note the I have build tf-a with the STM32_SPI_NAND=1 on the extra flags and I get a boot log from NAND boot if i perform software reset from uboot usb.

With softreset and tfa hardcoded the otp value for nand block nb[7:0]:

STM32MP> reset
resetting ...
▒NOTICE: CPU: STM32MP135F Rev.Y
NOTICE: Model: STMicroelectronics custom STM32CubeMX board - openstlinux-6.6-yocto-scarthgap-mpu-v25.06.11
INFO: Reset reason (0x74):
INFO: System reset generated by MPU (MPSYSRST)
INFO: FCONF: Reading TB_FW firmware configuration file from: 0x2ffe0000
INFO: FCONF: Reading firmware configuration information for: stm32mp_fuse
INFO: FCONF: Reading firmware configuration information for: stm32mp_io
INFO: Using SPI NAND
INFO: Instance 1
INFO: Boot used partition fsbl1
INFO: OTP: value 0x00000000
NOTICE: BL2: v2.10-stm32mp1-r2.0(debug):()

...

optee optee: OP-TEE: revision 4.0 (2a5b1d12)

U-Boot 2023.10-stm32mp-r2 (Oct 02 2023 - 14:39:59 +0000)

CPU: STM32MP135F Rev.Y

Questions:

1) Is OTP configuration for my NAND missing, the reason i get not log at all on nand boot? the board switches to USB enum from the programmer on hardreset.

2) If it is OTP needed, I came to a value from (How to configure flash memory for TF-A BL2) wiki of:

OTP Word 9 : 0x80200000

 but since I can't use fuse override on reset and I don't want make the OTP misconfiguration permanent, I would like to know that the issue of no log at all is bootrom related and if it is the correct value the one i shared.

Regards,

Pantelis Patsaoglou, Dreamxlabs

[Patsaoglou]

Hello, 

I have programmed the OTP but still no boot. Tfa after warm reset from programming boots since the correct OTP value is read but on hardware reset no boot with boot=111.

Still looking for help:-)

Regards

PP

[Patsaoglou]

Hello there,

Can someone give me a hand on the issue, since I have not found any other procedures in the documentation to try out.

Thank you

Kind regards 

PP

[PatrickF · Accepted solution]

Hi @Patsaoglou ,

Could you try https://wiki.st.com/stm32mpu/wiki/STM32_MPU_ROM_trace_analyzer ?

Have you look to AN5474, in particular this line

"During SPI mode boot using SI/SO, some serial memories could use IO2 and IO3 pins as additional feature like HOLD. In order to make this kind of device able to boot, it might be necessary to set those pins to inactive level by adding external pull-ups or by defining internal pull-up during Boot using OTP."

Regards

[Patsaoglou]

Hi @PatrickF,

Thank you for the follow-up, I appreciate it! I will give it a hardware test and get back to you!

Kind regards,

PP

[Patsaoglou]

Hi @PatrickF 

I have successfully booted from NAND by initially soldering 2 pullups, one for the nWP and one for the nHOLD noting that with a pullup only on nHOLD it does not boot. So I proceeded with the OTP value programming, configuring just the high speed pull-up and the proper mux for the QSPI bus:

 fuse override 0 5 0x4B95 4F95

Lastly I successfully booted without changing the bit[0] of word 3 for QSPI default mask flag.

Thank you very much for the help @PatrickF 

Kind Regards,

PP