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no MPU with RGMII, FDCAN, 2x SAI ?

LCE
Principal II

Heyho,

I just checked the MCU selector in CubeMX (6.13), and to my surprise I didn't find any MPU supporting the following:

  • gigabit ethernet (RGMII)
  • FDCAN
  • 2 SAIs (I need at least 4 standard I2S/PCM "stereo" channels)

The MP series don't have FDCAN.

Then I checked the N6, but at least in CubeMX I was not able to configure RGMII with all 4 SAI blocks (1 SAI block as master, the 3 other blocks as sync slaves).

That correct ?

Thanks in advance!

 

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Accepted Solutions
Peter BENSCH
ST Employee

No, that is not correct: the STM32MP2 contain Fast Datarate CAN. It is just not called FDCAN in their data sheet, but CAN FD.

Hope that helps?

Regards
/Peter

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3 REPLIES 3
Peter BENSCH
ST Employee

No, that is not correct: the STM32MP2 contain Fast Datarate CAN. It is just not called FDCAN in their data sheet, but CAN FD.

Hope that helps?

Regards
/Peter

In order to give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.
LCE
Principal II

Thanks for the quick reply @Peter BENSCH !

Is CubeMX a little limited for the MP series? Maybe people are using it with Linux anyway?

Even when activating the SAIs for the M33 core, I can't set them to synchronous slave to another SAI.

And I don't find any option to activate any CAN.

Hi @LCE ,

MCU selector has some naming issue. Agreed it is not really consistent around FDCAN naming.

 

CubeMx is not covering all the modes supported by the HW as it is also linked to SW/FW capabilities (especially on Linux).

On such complex product like STM32MP2, CubeMx is helping to have a good start point, but unfortunately it is not supporting everything. In all cases, you should have to tailor generated device-tree and configuration to your precise needs and HW (IP configurations, boards components, etc..).

Reference on what is supported for HW is Reference Manual (RM0457 for STM32MP23/STM32MP25).

Here is for instance the SAI instance synchronization signals:

PatrickF_1-1750681021581.png

For Linux, a lot of information could be found in https://wiki.st.com/stm32mpu
I'm not sure Linux support natively in-between SAI instance synchronization: https://wiki.st.com/stm32mpu/wiki/SAI_device_tree_configuration (only inter block seems supported).

For Cortex-M33, you should have a look to STM32CubeMP2 package https://wiki.st.com/stm32mpu/wiki/STM32CubeMP2_Package

 

Regards.

 

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