2025-08-22 11:36 AM
Hi! I am simulating the DDR4 memory interface with the STM32MP251. Same stack-up as the reference design. Only one memory connected (point to point).
I have used a Micron model for the memory but I think all the memory models are similar.
I am using 53 ohm for driver and 48 ohm for receivers and 48 ohm for ODT also.
1600 MT/s simulation is pretty fine but for 2400 MT/s there are FAILS on SETUP time for readings (see image attached).
I am not sure if the package delays are being considered by the Hyperlynx. On Altium all the delays are included but I don't know if this info is exported in the HYP file.
Anyone with experience can confirm if the package info is included or not?
Any ideas about the SETUP time FAILS?
Thanks!