2026-03-10 6:13 PM
Is it okay to use the following connection for eMMC memory on the STM32MP157AAB3?
Also, is it possible to set the eMMC memory to boot mode with this connection?
PB14:SDMMC2_D0
PB15:SDMMC2_D1
PB3:SDMMC2_D2
PB4:SDMMC2_D3
PB8:SDMMC2_D4
PB9:SDMMC2_D5
PC6:SDMMC2_D6
PC7:SDMMC2_D7
PC1:SDMMC2_CK
PG6:SDMMC2_CMD
2026-03-23 9:08 AM
Hello @Z_yamada,
The official documentation specifies the following default pin assignments for connecting eMMC to SDMMC2 on the STM32MP157AAB3:
| Signal | STM32 Pin |
|---|---|
| SDMMC2_D0 | PB14 |
| SDMMC2_D1 | PB15 |
| SDMMC2_D2 | PB3 |
| SDMMC2_D3 | PB4 |
| SDMMC2_D4 | PA8 |
| SDMMC2_D5 | PA9 |
| SDMMC2_D6 | PE5 |
| SDMMC2_D7 | PD3 |
| SDMMC2_CK | PE3 |
| SDMMC2_CMD | PG6 |
Your proposed connection uses PB8, PB9, PC6, PC7, and PC1 for D4-D7 and CK, which does not match the documented configuration. Therefore, it is not recommended to use your proposed pinout for eMMC on STM32MP157AAB3.
For eMMC boot mode, the STM32MP157AAB3 boot ROM expects the eMMC to be connected to SDMMC2 using the default pin assignments listed above.
The minimum set of signals required by the boot ROM during eMMC boot are these default pins.
Using a different pinout (alternate mapping) is not supported by default for boot unless you have specifically programmed the OTP (One-Time Programmable) memory to change the AFmux (alternate function multiplexing) configuration.
Alternate pin mapping for SDMMC2 (e.g., using PB8, PB9, PC6, PC7, PC1) is only possible if you have configured the appropriate OTP fields to inform the boot ROM of the new mapping. If you have not programmed these OTP fields, the boot ROM will not recognize the alternate mapping, and eMMC boot will fail.
The proposed configuration is valid it matches the reference schematic used on AN5031 figure 37. eMMC™ connection example. Here is the full analysis.
Each signal must use the correct Alternate Function (AF) in the device tree (TF-A, U-Boot, Linux):
| Signal | Pin | AF | Recommended Mode |
|---|---|---|---|
| SDMMC2_D0 | PB14 | AF9 | Pull-Up, High Speed |
| SDMMC2_D1 | PB15 | AF9 | Pull-Up, High Speed |
| SDMMC2_D2 | PB3 | AF9 | Pull-Up, High Speed |
| SDMMC2_D3 | PB4 | AF9 | Pull-Up, High Speed |
| SDMMC2_D4 | PB8 | AF10 | Pull-Up, High Speed |
| SDMMC2_D5 | PB9 | AF11 :warning: | Pull-Up, High Speed |
| SDMMC2_D6 | PC6 | AF10 | Pull-Up, High Speed |
| SDMMC2_D7 | PC7 | AF10 | Pull-Up, High Speed |
| SDMMC2_CK | PC1 | AF12 | No Pull, High Speed |
| SDMMC2_CMD | PG6 | AF10 | Pull-Up, High Speed |
:warning: Watch out: PB9 uses AF11 (not AF10) for SDMMC2_D5 — this is a very common mistake in custom device trees.
The STM32MP157 Boot ROM uses these default pins for eMMC boot over SDMMC2:
| Signal | Default ROM boot pin |
|---|---|
| SDMMC2_CK | PE3 (AF9) ← differs from your design! |
| SDMMC2_CMD | PG6 (AF10) :white_heavy_check_mark: |
| SDMMC2_D0 | PB14 (AF9) :white_heavy_check_mark: |
Your design uses PC1 for SDMMC2_CK instead of PE3. You must therefore program the OTP words to declare a non-default AFmux configuration.
OTP_WORD3[2:1] = 0b10 (value = 2) → SDMMC2 with non-default AFmux defined in OTP words:
OTP WORD3 : bit[2]=1, bit[1]=0 → contribution = 0x00000004The Boot ROM only uses D0, CMD, and CK during the initial boot phase. Each OTP WORD holds 2 pin configurations (16 bits each) using the following format:
Bits[31:16] = pin1 : [31:28]=port | [27:24]=pin# | [23:20]=AF | [19:16]=mode
Bits[15:0] = pin0 : [15:12]=port | [11:8]=pin# | [7:4]=AF | [3:0]=modePort codes: 1=A, 2=B, 3=C, 4=D, 5=E, 6=F, 7=G
Mode codes: 2=AF/NoPull/HighSpeed, 5=AF/PullUp/HighSpeed
OTP WORD5 → PC1 (SDMMC2_CK) + PG6 (SDMMC2_CMD):
pin0 = PC1, AF12, No Pull, High Speed
→ port=3, pin=1, af=0xC, mode=2 → 0x31C2
pin1 = PG6, AF10, Pull-Up, High Speed
→ port=7, pin=6, af=0xA, mode=5 → 0x76A5
OTP WORD5 = 0x76A531C2OTP WORD6 → PB14 (SDMMC2_D0):
pin0 = PB14, AF9, Pull-Up, High Speed
→ port=2, pin=14 (0xE), af=0x9, mode=5 → 0x2E95
pin1 = unused → 0x0000
OTP WORD6 = 0x00002E95To enable eMMC boot on STM32MP157, set the hardware boot pins as follows:
BOOT[2:0] = b010 → BOOT2=0, BOOT1=1, BOOT0=0