sgtl5000 codec dsi i2c

[Ara.1]

Hi All,

i am using stm32mp1 with i2c on sgtl5000 codec and control lines are over carrier i2s

i am getting kernel soc sgtl5000.c error

sgtl5000 0-000a: Error reading chip id -6

<STM32_PINMUX('A', 15, AF5)>; /* I2S1_WS */

<STM32_PINMUX('Z', 0, AF5)>, /* I2S1_CK */

                  <STM32_PINMUX('Z', 1, AF5)>, /* I2S1_SDI */

                  <STM32_PINMUX('Z', 2, AF5)>, /* I2S1_SDO */

                  <STM32_PINMUX('Z', 6, AF5)>; /* I2S1_MCK */

Any reference dts on i2s1 would be helpful.. and suggest on kernel error .

[Bernard PUEL]

very strange because the get_clock from the codec is enabling the right "mclk" clock but does not call the I2s ...

it cannot happen or there something we miss.

We don't have HW design to check the full use case (only unitary tests we run every release) and the fact you are on quite old (not maintained anymore) kernel does not help.

I will review again with expert because it seems we are not so far to have something running ...

[Ara.1]

Yes most of audio codec depend on external crystal or soc dedicated system clock fed as codecs input MCLK to read chip ID, but in our board, we treat soc audio controller i2sX mclk as a clock source, ideally i2s should feed mclk on sgtl5000 probe, which is not happening in currently. I believe similar behavior would have been with 5.X.XX kernel.

[Bernard PUEL]

Could you please share de complete kernel trace (35 first seconds) ? there is probably some evidences in it ...

[Ara.1]

PFA

in this i added my printks to see the behaviour.

[Bernard PUEL]

Looking to the step:

[  4.559080] sound/soc/stm/stm32_i2s.c stm32_i2smclk_enable:415 ret 0

[  4.565435] sound/soc/stm/stm32_i2s.c stm32_i2smclk_enable:418 mkoe enable

[  4.572362] sound/soc/soc-core.c snd_soc_register_component:3393

[  4.572372] sound/soc/soc-core.c snd_soc_add_component:3356

[  4.583941] ********************name OutToPins_codec@0  OutToPins_codec      found eeaddd54

[  4.583948] g_serial gadget: high-speed config #2: CDC ACM config

[  4.599083] legacy_dai_naming 0 0 OutToPins-pcm

[  4.603596] sound/soc/soc-core.c soc_add_dai::3051 multiple 0

[  4.609380] sound/soc/soc-core.c fmt_multiple_name::2986 multiple name c0d6edb0

[  4.616701] sound/soc/soc-core.c fmt_multiple_name::2994 multiple name OutToPins-pcm

[  4.624494] ASoC: Registered DAI sound/soc/soc-core.c soc_add_dai::3083 NULL

[  4.631584] sound/soc/soc-core.c snd_soc_register_component:3405

[  4.638104] sound/soc/codecs/sgtl5000.c sgtl5000_enable_regulators::1261 0 

[  4.638370] sgtl5000 0-000a: enabling clock 0

After the mkoe instruction the clock should be there but our assumption is the mclk is not the right value (because the i2s driver is designed to enable / calculate the mclk only on alsa sounds activation).

Were you able to measure this clock at this step (so before the request from alsa soc to enable it in 48khz in slave mode) ?

[Bernard PUEL]

the assumption is that the parent clock or divider is not correctly set at this step so out of the range the codec is able to work.

[Bernard PUEL]

You might add some debug information thanks to clock framework APIs: https://wiki.st.com/stm32mpu/wiki/Clock_overview#API_description

Or activate clock framework dynamic debug.

[Ara.1]

Hello bernard,

getting mclk after 30 sec sec,

is it possible to generate the mclk during the stm32_i2s probe which shall be with 5 sec is that possible ?

[Bernard PUEL]

ideally it should be present after the mkoe instruction in your trace:

[  4.565435] sound/soc/stm/stm32_i2s.c stm32_i2smclk_enable:418 mkoe enable

But the driver is not design to work like this so getting more information of what happens at this stage (around clock management) would help.

So adding some trace here would help to understand what happens (see clock API get_parent or get_rate).

We see later in the trace something we don't explain (but this is not an issue):

[  5.988602] sound/soc/stm/stm32_i2s.c stm32_i2s_set_sysclk:709 cpu_dai 44004000.audio-controller (null)

[  5.998125] ****************I2S MCLK frequency is 48000Hz. mode: slave, dir: output

=> Slave mode means no output and 48KHz is not requested rate value.

IT would be good to check with some trace what is the status during mkoe enable because if it is the same, it explains why there is no output.

[Ara.1]

now i made change the dts, i2s driver to get

[  5.764173] sound/soc/stm/stm32_i2s.c stm32_i2s_set_sysclk:733 cpu_dai 44004000.audio-controller (null)

[  5.773684] ****************I2S MCLK frequency is 11289600Hz. mode: master, dir: output

[  5.781722] sound/soc/stm/stm32_i2s.c stm32_i2s_set_sysclk:743 freq 11289600 dir 1 mode 1

still no clock, and i see no error on clock management file, at end after 35 sec mclk is on,

attached is log