Mainline Linux fails to set up FS OTG

[JGuy1]

Hi there,

After following this tutorial (and updating the compatible string): https://wiki.st.com/stm32mpu/wiki/OTG_device_tree_configuration

I've managed to create a patch that adds these nodes to my device tree:

...
+&usbphyc {
+	status = "okay";
+};
+
+&usbh_ehci {
+	phys = <&usbphyc_port0>, <&usbphyc_port1 1>;
+	phy-names = "usb1-phy", "usb2-phy";
+	status = "okay";
+};
+
+&usbphyc_port0 {
+	phy-supply = <&vdd_usb>;
+	vbus-supply = <&usb1vbus>;
+	vdda1v1-supply = <&reg11>;
+	vdda1v8-supply = <&reg18>;
+};
+
+&usbphyc_port1 {
+	phy-supply = <&vdd_usb>;
+	vbus-supply = <&usb2vbus>;
+	vdda1v1-supply = <&reg11>;
+	vdda1v8-supply = <&reg18>;
+};
+
+&usbotg_hs {
+	compatible = "st,stm32mp15-fsotg", "snps,dwc2";
+	pinctrl-names = "default";
+	pinctrl-0 = <&usbotg_hs_pins_a &usbotg_fs_dp_dm_pins_a>;          /* configure OTG ID and full-speed data pins */
+	vbus-supply = <&vbus_otg>;                                        /* voltage regulator to supply Vbus */
+	dr_mode = "peripheral";
+	status = "okay";
+};
...

However, when booting mainline ATF, Barebox (which doesn't support USB) and Linux I get this error:

[    9.512679] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
[    9.596691] dwc2 49000000.usb-otg: supply vusb_d not found, using dummy regulator
[    9.617678] dwc2 49000000.usb-otg: supply vusb_a not found, using dummy regulator
[    9.686136] ehci-platform 5800d000.usbh-ehci: EHCI Host Controller
[    9.701347] ehci-platform 5800d000.usbh-ehci: new USB bus registered, assigned bus number 1
[    9.724039] dwc2 49000000.usb-otg: dwc2_core_reset: HANG! Soft Reset timeout GRSTCTL_CSFTRST
[    9.762983] ehci-platform 5800d000.usbh-ehci: irq 60, io mem 0x5800d000
[    9.820584] ehci-platform 5800d000.usbh-ehci: USB 2.0 started, EHCI 1.00
[    9.826972] dwc2: probe of 49000000.usb-otg failed with error -16

Is there something I'm missing here?

[Olivier GALLIEN]

Hi @JGuy​ ,

Seems you are using Custom environment Linux Mainline + Barebox.

This can likely explain issue you are facing.

Why not using OpenSTLinux ? eg latest V2.1 https://wiki.st.com/stm32mpu/wiki/STM32MP15_OpenSTLinux_release_note

Olivier

[JGuy1]

Hi Olivier, at the moment we're trying to about OpenSTLinux as our tooling is build around buildroot and barebox. We do plan to move to ST ATF and Linux, but really want to keep barebox and buildroot.

As I'm aware ST's ATF doesn't work correctly with barebox due to using some kind of proprietary API. I haven't tested this, but I'm trying to work around it by waiting until mainline support is a bit more compatible.

[JGuy1]

It looks like this patch is needed for the OTG driver (made by Seeed):

diff --git a/drivers/usb/dwc2/platform.c b/drivers/usb/dwc2/platform.c
index 5f18acac7406..c5332ddce4bd 100644
--- a/drivers/usb/dwc2/platform.c
+++ b/drivers/usb/dwc2/platform.c
@@ -495,6 +495,27 @@ static int dwc2_driver_probe(struct platform_device *dev)
 	if (retval)
 		goto error;
 
+	/*
+	* Connect FS PHY transceiver to prevent 'HANG! Soft Reset timeout'
+	*/
+	if (!hsotg->phy) {
+		u32 v;
+
+		v = dwc2_readl(hsotg, GGPIO);
+		if (!(v & GGPIO_STM32_OTG_GCCFG_PWRDWN)) {
+			/*
+			* STM32 uses the GGPIO register as general
+			* core configuration register.
+			*/
+			v |= GGPIO_STM32_OTG_GCCFG_PWRDWN;
+			dwc2_writel(hsotg, v, GGPIO);
+		}
+
+		v = dwc2_readl(hsotg, GUSBCFG);
+		v |= GUSBCFG_PHYSEL;
+		dwc2_writel(hsotg, v, GUSBCFG);
+	}
+
 	/*
 	 * Reset before dwc2_get_hwparams() then it could get power-on real
 	 * reset value form registers.