Interfacing FMC with multiple chip selects on a single NAND Flash

[TOlli]

Hi,

I've been looking at the following NAND flash to use as a "mass" memory for my MP1 project (to hold Linux and data storage during run time). Booting and setup is done via QSPI NOR Flash.

https://www.mouser.fi/datasheet/2/877/datasheet_en_20181214-1484073.pdf

The NAND Flash does, however, have two sets of chip selects and Ready/Busy outputs.

Is there a way to interface this with the FMC to gain access to all 16Gb of storage using the MP153C? The reference manuals do refer to multiple NCEs but I don't find them on the pin list in CubeMX.

Do I just need to use ADDR[25:24] for the chip selects? And then mux the Ready/Busy outputs from the memory together to the NWAIT input on the FMC?

Thank you for your help,

Tero

[PatrickF]

Hi,

FMC_NCE2 is available on PE15 (AF10) . No need to use any ADDR signal.

Both R/B pins could be tied together (as they are open drain).

For the moment CubeMX and OpenSTLinux only supports single Chip-Select NAND on FMC (FMC_NCE on pin PG9).

[TOlli]

Hello Patrick,

Are there any plans on extending the functionality to include dual chip-select for NAND Flash?

Your answer makes it sound that even if I were to hook up the FMC_NCE2 and combine the R/B pins, the operating system would not be able to use the full memory area, due to the fact it does not understand the extra chip-select. Is this correct assumption?

There seems to be more than one always when going above 8Gb, and it's difficult to find suppliers with only one chip select.

Best Regards,

Tero

[PatrickF · Accepted solution]

Hello,

In fact, this kind of device (one part with two very same NAND with one CS each) is already supported in OpenSTLinux thru standard NAND framework.

Only CubeMX lack this option at the moment, but you can modify the Device Tree by yourself to add the FMC_CE2 on PE15 muxing.

Then binding for the NAND controller will look like:

&nand_controller {
            Pinctrl … = ….;
            …
 
            nand@0{
                        reg = <0 1> ;
                        ….
            } ;
} ;

Note that only NAND connected to FMC_NCE (=FMC_NCE1) is visible from BootROM in case the SLC NAND is your primary boot source.

[TOlli]

Thank you Patrick,

I will look more into this