Hello,
I'm designing a 2 layer PCB using STM32WL for LoRa operations at 433MHz and need a review of my RF layout. The board is JLCPCB 2 layer standard FR4, 1.6mm thick 1.46mm core, 1oz copper, 50Ω microstrip at ~2.8mm width, about 38mm long. I have placeholder caps/inductor to be populated after board fabrication.
I am seeking expert opinion for:
Trace width & impedance - does 2.8mm yield 50ohm given FR4, 1oz copper, and 1.46mm dielectric height?
Critical length - Are there implications for 38mm length on transmission-line behavior?
Taper - Taper starts 5mm in. Are there optimal lengths for tapers? Should I taper for shunt pads?
Stitching vias - Recommendations for via spacing for this trace width? Every 5-8mm?
Test points - Recommendations for RF test points without effecting impedance?
Any other best practices or tips would be helpful. I thank you for any guidance.
Best, John
